1. MEMS devices: How do we make them?
A mechanism
Gear chain Hinge Gear within a gear
Sandia MEMS

2. Basic MEMS materials Silicon and its derivatives, mostly
Micro-electronics heritage
Si is a good semiconductor, properties can be tuned
Si oxide is very robust
Si nitride is a good electrical insulator
Substrate
Cost
Metallization
Machinability
Silicon
High
Good
Very good
Plastic
Low
Poor
Fair
Ceramic
Medium
Glass

3. Surface micromachining
How a cantilever is made:

4. One can make devices as complex as one wishes
using deposition and micromachining processes

5. Any MEMS device is made from the processes
of deposition and removal of material
e.g. a state-of-the art MEMS electric motor

6. The History of MEMS
Y.C.Tai, Caltech

7. Isotropic Anisotropic
Bulk micromachining
Wet Chemical etching:
Masking layer
Bulk Si
Bulk Si
Isotropic Anisotropic

8. Bulk micromachining Dry etching
Ions: Reactive ion etching (RIE), focused ion beams (FIB)
Laser drilling: using high powered lasers (CO2/YAG)
Electron-beam machining: sequential slow

9. Wet Etching: Isotropic
atomic layer by atomic layer removal possible
Isotropic etching: Hydrofluoric + nitric + acetic acids (HNA)
Bulk Si
Chemical reaction:
Si + 6 HNO3+6 HF H2SiF6 + HNO2 + H2O + H2
Principle:
HNO3 (Nitric acid) oxidizes Si  SiOx
HF (Hydrofluoric Acid) dissolves SiOx
Acetic acid/water is a diluent

10. This implies preferential/anisotropic etching is possible
Anisotropic etching, due to the Silicon crystal structure
- Diamond cubic crystal structure X Y Z
Different planes of atoms in a Silicon crystal have different
densities of atoms
(111) (100) (110) (111)
This implies preferential/anisotropic etching is possible

11. Applications: Anisotropic Etching
Aligning fibers
Inkjet printers
fiber

12. Wet etching: Anisotropic Etching
(100)
(110)
(100)
(111)
Bulk Si
Bulk Si
Chemical recipes:
EDP (Ethylene diamine, pyrocatechol, water)
[NH2(CH2)2NH2, C6H4(OH)2]
- low SiO2 etch rate, - carcinogenic
KOH (Potassium hydroxide),
- high <110> / <111> and <100>/ <111> selectivity ( ~ 500)
- high SiO2 etching
TMAH (Tetra-methyl Ammonium Hydroxide: (CH3)4NOH)
- Low SiO2 and SixNy etch rate
- smaller <100> / <111> selectivity

13. Comparison of wet chemical etches
Etchant
Typical etching conditions
Anisotropic <100>/<111> etching ratio
Etch rate of masking layers
EDP oC
20-80 mm/hr
10-35
SiO2(2 Å/min)
SiN(1 Å/min)
KOH
50-90 oC
mm/hr
TMAH
60-90 oC
10-60 mm/hr
10-20
Reference: “Etch rates for Micromachining Processing”
- K. R. Williams, IEEE Journal of MEMS, vol. 5, page 256, 1996.

14. Sensors based on (100) preferential etching
Honeywell sensor

15. Micro-fluidic channels
based on (110) preferential etching

16. MEMS Process Sequence
Slide courtesy: Al Pisano

17. Surface micromachining
How a cantilever is made:
Sacrificial material: Silicon oxide
Structural material: polycrystalline Si (poly-Si)
Isolating material (electrical/thermal): Silicon Nitride

18. MEMS Processing
Oxidation of Silicon  Silicon Oxide (Sacrificial material)
Dry Oxidation: flowing pure oxygen over 850 – 1100 oC
(thin oxides nm, high quality of oxide)
Uses the Deal-Grove Model: xoxide = (BDGt)1/2
Temperature (oC) BDG (mm2/ hour)

19. MEMS Processing Oxidation of Silicon  Silicon Oxide
(Sacrificial material)
Wet Oxidation: uses steam
for thicker oxides (100nm – 1.5 mm, lower quality)
Temperature (oC) BDG (mm2/ hour)
Higher thicknesses of oxide: CVD or high pressure steam oxidation

20. Silicon oxide deposition
LTO: Low Temperature Oxidation process
For deposition at lower temperatures, use
Low Pressure Chemical Vapor Deposition (LPCVD)
SiH4 + O2  SiO2 + 2 H2 : 450 oC
Other advantages:
Can dope Silicon oxide to create PSG (phospho-silicate glass)
SiH4 + 7/2 O PH3  SiO2:P + 5 H2O : 700 oC
PSG: higher etch rate, flows easier (better topography)
SiH4 + O2 oC
Torr

21. Case study: Poly-silicon growth
SiH4
by Low Pressure Chemical Vapor Deposition
T: oC, P: Torr
Effect of temperature
Amorphous  Crystalline: oC
Equi-axed grains: oC
Columnar grains: oC
(110) crystal orientation: 600 – 650 oC
(100) crystal orientation: 650 – 700 oC
Amorphous film
570 oC
Crystalline film
620 oC
Kamins,T Poly-Si for ICs and diplays, 1998

22. Poly-silicon growth Mechanisms of grain growth: Strain induced growth
Temperature has to be very accurately controlled
as grains grow with temperature, increasing surface
roughness, causing loss of pattern resolution and stresses in
MEMS
Mechanisms of grain growth:
Strain induced growth
- Minimize strain energy due to mechanical deformation, doping …
- Grain growth  time
2. Grain boundary growth
- To reduce surface energy (and grain boundary area)
- Grain growth  (time)1/2
3. Impurity drag
- Can accelerate/prevent grain boundary movement
- Grain growth  (time)1/3

23. Grains control properties
Mechanical properties
Stress state: Residual compressive stress (500 MPa)
- Amorphous/columnar grained structures: Compressive stress
- Equiaxed grained structures: Tensile stress
Thick films have less stress than thinner films
ANNEALING CAN REDUCE STRESSES BY A
FACTOR OF
Thermal and electrical properties
Grain boundaries are a barrier for electrons
e.g. thermal conductivity could be 5-10 times lower (0.2 W/cm-K)
Optical properties
Rough surfaces!

24. Silicon Nitride (for electrical and thermal isolation of devices)
r: 1016 W cm, Ebreakdown: 107 kV/cm
Is also used for encapsulation and packaging
Used as an etch mask, resistant to chemical attack
High mechanical strength ( GPa) for SixNy, provides structural integrity (membranes in pressure sensors)
Deposited by LPCVD or Plasma –enhanced CVD (PECVD)
LPCVD: Less defective Silicon Nitride films
PECVD: Stress-free Silicon Nitride films
SiH2Cl2 + NH3
x SiH2Cl2 + y NH3  SixNy + HCl + 3 H2 oC
Torr

25. Depositing materials PVD (Physical vapor deposition)
Sputtering: DC (conducting films: Silicon nitride) RF (Insulating films: Silicon oxide)

26. Depositing materials PVD (Physical vapor deposition)
Evaporation (electron-beam/thermal)
Commercial electron-beam evaporator (ITL, UCSD)

27. Electroplating Issues: Micro-void formation Roughness on top surfaces
Courtesy: Jack Judy
Issues:
Micro-void formation
Roughness on top surfaces
Uneven deposition speeds
Used extensively for LIGA processing
e.g. can be used to form porous Silicon, used for
sensors due to the large surface to volume ratio

28. Depositing materials –contd.-
Spin-on (sol-gel)
e.g. Spin-on-Glass (SOG) used as a sacrificial molding material, processing can be done at low temperatures
Dropper
Si wafer

29. Surface micromachining
- Technique and issues
- Dry etching (DRIE)
Other MEMS fabrication techniques
- Micro-molding
- LIGA
Other materials in MEMS
- SiC, diamond, piezo-electrics,
magnetic materials, shape memory alloys …
MEMS foundry processes
- How to make a micro-motor

30. Surface micromachining
Carving of layers put down sequentially on the substrate by using selective etching of sacrificial thin films to form free-standing/completely released thin-film microstructures
HF can etch Silicon oxide but does not affect Silicon
Release step
crucial

31. Release of MEMS structures
A difficult step, due to surface tension forces:
Surface Tension forces are greater than gravitational forces
( L) ( L)3

32. Release of MEMS structures
To overcome this problem:
Use of alcohols/ethers, which sublimate, at release step
Surface texturing
Supercritical CO2 drying: avoids the liquid phase
Si substrate
Cantilever
35oC,
1100 psi

33. A comparison of conventional vs. supercritical drying

34. Reactive Ion Etching (RIE)
DRY plasma based etching
Deep RIE (DRIE):
Excellent selectivity to mask material (30:1)
Moderate etch rate (1-10 mm/minute)
High aspect ratio (10:1), large etch depths possible

35. Deep Reactive Ion Etching (DRIE)
A side effect of a glow discharge  polymeric species created
Plasma processes:
Deposition of polymeric material from plasma vs. removal of material
Usual etching processes result in a V-shaped profile
Bosch Process Alternate etching (SF6) +Passivation (C4F8)
Bowing: bottom is wider
Lag: uneven formation

36. Gas phase Silicon etching
Room temperature process
No surface tension forces
No charging effects
Isotropic
XeF2 BrF3
Developed at IBM (1962) Developed at Bell labs (1984)
2 XeF2 + Si  2 Xe + SiF BrF3 + 3 Si  2 Br2 + 3 SiF4
Cost: $150 to etch 1 g of Si $16 for 1 g of Si
Etching rate: 1-10 mm/minute

37. Micro-molding For thick films (> 100 mm)
HEXSIL/PDMS, compatible with Bio-MEMS
C. Keller et al, Solid state sensor & actuator workshop, 1994
- loss of feature definition after repeated replication
- Thermal and mechanical stability

38. (LIthographie, Galvanoformung, Abformung)
LIGA
(LIthographie, Galvanoformung, Abformung)
For high aspect ratio structures
Thick resists (> 1 mm)
high –energy x-ray lithography ( > 1 GeV)
Millimeter/sub-mm sized objects which require precision
Electromagnetic motor
Mass spectrometer with hyperbolic arms

39. Technology Comparison
Bulk vs. Surface micromachining vs. LIGA
Capability
Bulk
Surface
LIGA
Max. structural thickness
Wafer thickness
< 50 mm
500 mm
Planar geometry
Rectangular
Unrestricted
Min. planar feature size
2 depth
< 1 mm
< 3 mm
Side-wall features
54.7o slope
Limited by dry etch
0.2 mm
Surface & edge
definitions
Excellent
Adequate
Very good
Material properties
Very well controlled
Well controlled
Integration with electronics
Demonstrated
Difficult
Capital Investment
Low
Moderate
High
Published knowledge
Very high