1. How Computers Work Lecture 5 Page 1 How Computers Work Lecture 5 Memory Implementation

2. How Computers Work Lecture 5 Page 2 A Top-Down View of the Beta Architecture With st(ra,C,rc) : Mem[C+ ]

3. How Computers Work Lecture 5 Page 3 Today’s Lecture: How do we build these? WD Memory WD Register File RA2 Memory RD2 WA WE Register File RA1 RD1 RA2 RD2 Register File RA1 Memory RD1

4. How Computers Work Lecture 5 Page 4 Recall the Enable-Controlled Register D E Q CLK 32

5. How Computers Work Lecture 5 Page 5 How do we select 1 of 31 registers to read? D E Q D E Q D E Q......

6. How Computers Work Lecture 5 Page 6 A: Add an output selector. D E Q D E Q D E Q...... 0 RA1 RD1 =

7. How Computers Work Lecture 5 Page 7 Q: How do we add a second port? D E Q D E Q D E Q...... 0 RA1 RD1 =

8. How Computers Work Lecture 5 Page 8 A: Add a second multiplexor D E Q D E Q D E Q...... 0 RA1 RD1 = RA2 RD2 = 0

9. How Computers Work Lecture 5 Page 9 Q: How do we write selectively? D E Q D E Q D E Q...... 0 RA1 RD1 = RA2 RD2 = 0

10. How Computers Work Lecture 5 Page 10 A: Use a decoder on the Enables D E Q D E Q D E Q...... 0 RA1 RD1 = RA2 RD2 = 0 WERF WA WD 0 1 30 31 0 1 30 31 0 1 30 31

11. How Computers Work Lecture 5 Page 11 The Decoder / Demultiplexor

12. How Computers Work Lecture 5 Page 12 To minimize wires: D E Q D E Q D E Q...... 0 RA1 RD1 RA2 0 WERF WA WD 0 1 30 31 0 1 30 31 0 1 30 31 D E Q D E Q D E Q...... RD2 WD 0 1 30 31

13. How Computers Work Lecture 5 Page 13 Q: What about the clocks? D E Q D E Q D E Q...... 0 RA1 RD1 = RA2 RD2 = 0 WERF WA WD 0 1 30 31 0 1 30 31 0 1 30 31

14. How Computers Work Lecture 5 Page 14 A: Connect them all together. D E Q D E Q D E Q...... 0 RA1 RD1 = RA2 RD2 = 0 WERF WA WD 0 1 30 31 0 1 30 31 0 1 30 31 Clock

15. How Computers Work Lecture 5 Page 15 Q: Is it practical to do the big Memory this way? A: NO

16. How Computers Work Lecture 5 Page 16 Minimize per-bit circuitry.........

17. How Computers Work Lecture 5 Page 17 1 Bit Cell

18. How Computers Work Lecture 5 Page 18 Minimizing per-bit circuitry......... Sense Amplifiers

19. How Computers Work Lecture 5 Page 19 How about ROMs?

20. How Computers Work Lecture 5 Page 20 Q: What can we use for a switch? A: The Field-Effect Transistor

21. How Computers Work Lecture 5 Page 21 The N-Channel FET (NFET) L H

22. How Computers Work Lecture 5 Page 22 The P-Channel FET (PFET) L H

23. How Computers Work Lecture 5 Page 23 How do we implement multiple ports? 2 Read and 1 Write Ports –For now, LD and ST instructions are mutually exclusive. 1 RD + 1 RD/WR port needed LD and ST are don’t happen that often –Most of the time only 1RD port necessary Easy answer : Do them sequentially –Need a way to “stall” machine waiting for Mem

24. How Computers Work Lecture 5 Page 24 Q: How do we stall this machine? WD Memory WD Register File RA2 Memory RD2 WA RC WERF WEMEM WA WE A B A op B Register File RA1 RD1 RA2 RD2 RARBRC BSELASEL ALUFN WDSEL0 01 01012 1 ALU Register File SEXT C 4:0 9:5 20:5 25:2131:26 OPCODE RA1 Memory RD1 PC Q +1 D PC Z 01 JMP(R31,XADDR,XP) XADDR 01 2 ISEL PCSEL OPCODE

25. How Computers Work Lecture 5 Page 25 A: Stalls are done by: Disabling WERF Disabling Memory Write Disabling PC write

26. How Computers Work Lecture 5 Page 26 Another Approach - Increasing Memory Bandwidth Make memory twice as wide –64 Bits Instead of 32 Should work out in the long run, as 2 words are read per machine cycle, but –Words read are next to each other in address space –Need a place to stash the extra word –Sometimes, the stashed word isn’t used.

27. How Computers Work Lecture 5 Page 27 Summary What Did we learn today? –How to Implement Registers + Big Memory –Multi-Port Big Memories aren’t easy Sequential Access (stalls + extra logic) Wide Access + Some sort of cache + extra logic Recitation –Review of today’s lecture