1. AHCAL updates: SPIROC and DIF Mathias Reinecke, Felix Sefkow CALICE/EUDET electronics meeting London, January 10, 2008

2. MC Tile Hadron Calorimeter Felix Sefkow January 10, 2008 2 Topics SPIROC tests and future development AHCAL specific DIF Towards the EUDET module

3. MC Tile Hadron Calorimeter Felix Sefkow January 10, 2008 3 SPIROC tests at DESY Started with strong support from LAL group –Merci, Ludovic, Stephane, Christophe! still needs real electronics expert support, not just an issue of developing control software

4. MC Tile Hadron Calorimeter Felix Sefkow January 10, 2008 4 First measurements Initially focus on analogue part Gain, noise, linearity –Limited by set-up, ADC and DAQ being prepared this week Some instabilities: B.Lutz, R.Fabbri

5. MC Tile Hadron Calorimeter Felix Sefkow January 10, 2008 5 SPIROC tests: status and outlook Confirm first LAL measurements on gain, noise But also inconsistencies, actively being sorted out in close contact with LAL Once chip handling stabilizes, would like to work on 2 set-ups in parallel –Support from Heidelberg (W.Shen) Also addressing digital issues –involve and inspire DIF designer Need to organize task sharing and code development For discussion: define realistic time scale to understand the chip

6. MC Tile Hadron Calorimeter Felix Sefkow January 10, 2008 6 SPIROC wish lists For the next version Bypass for fail-safe set-up Smaller package For future versions beyond EUDET Channel-by-channel triggering and memory management Individual chip addressing for fail-safe set-up Explore possibilities to increase signal/noise and reduce pick-up –for use with lower gain SiPMs and more robust gain calibration –Input coupling, pre-amp design Support functionalities –DAC for calibration voltage V calib –Read-out internal and external temperature sensor

7. Tile Hadron CalorimeterFelix Sefkow January 10, 20087 Failsafe Setup Mathias ReineckeEUDET annual meeting – Paris8.-10. Oct. 2007 Up to 24 SPIROCs (864 detector channels) in slow-control and readout chain (AHCAL). A broken chip would disable the complete chain. Proposal: Implementation in next ASIC versions agreed Scheme for input selection to be decided. Proposals: input detection logic at bypass in static signal from previous chip: 2 extra pins solder bridge (least elegant)

8. MC Tile Hadron Calorimeter Felix Sefkow January 10, 2008 8 Package Technical prototype should demonstrate feasibility of compact read-out gap and have realistic signal density and heat couplng Aim at 1.5mm total height of PCB + components Present SPIROC prototype package is 4.3mm high –240 pins, not all used, many redundant Goal TQFP 100 pins 1.0mm –intermediate? LQFP 144 pins, 1.4 mm pin list proposal exists Risk of layout moddif.?

9. MC Tile Hadron Calorimeter Felix Sefkow January 10, 2008 9 SPIROC signals Signal connector Power connector 2 lines per slab (1.5 MHz) ?

10. Tile Hadron CalorimeterFelix Sefkow January 10, 200810 DIF – AHCAL specific part Mathias ReineckeCALICE meeting – DESYDec. 2007

11. Tile Hadron CalorimeterFelix Sefkow January 10, 200811 AHCAL Half Sector - Reminder Mathias ReineckeCALICE meeting – DESYDec. 2007 AHCAL Slab 6 HBUs in a row HBU HCAL Base Unit typ. 12 x 12 tiles SPIROC typ. 4 on a HBU HEB HCAL Endcap Board Hosts mezzanine modules: DIF, CALIB and POWER HLD HCAL Layer Distributor

12. Tile Hadron CalorimeterFelix Sefkow January 10, 200812 AHCAL: Unit CALIB Mathias ReineckeCALICE meeting – DESYDec. 2007 POWER CALIB DIF To LDA Gain calibration, -monitoring and operational tests by controlling the: -Charge injection circuits (SPIROC‘s charge inj. inputs) -Light calibration (LED) system -External trigger (without or in combination with LCS) -Power cycling for calibration electronics inside detector layer (two lines, very low current) Unit CALIB is fully controlled by the DIF (slave operation).

13. Tile Hadron CalorimeterFelix Sefkow January 10, 200813 AHCAL: Unit POWER+Monitoring Mathias ReineckeCALICE meeting – DESYDec. 2007 POWER CALIB DIF To LDA Power supply for the HBUs, monitoring of temperature and supply voltages -Provide +3.5V, +5V and SiPM bias voltages (+GND) to the HBUs -Read temperature monitors from HBUs (inside gap) -Read voltage/current monitors of supply voltages (outside gap). -Power cycling for electronics inside detector layer Unit POWER is fully controlled by the DIF (slave operation) - ossibly via CALIB, no second µControler needed.

14. Tile Hadron CalorimeterFelix Sefkow January 10, 200814 DIF: AHCAL specific part Mathias ReineckeCALICE meeting – DESYDec. 2007 Very first idea about a possible setup. X

15. Tile Hadron CalorimeterFelix Sefkow January 10, 200815 Interconnection Mathias ReineckeCALICE meeting – DESYDec. 2007 HBU Interconnection „Flexlead“ (4 layers in 300µm) Connector stacking height (both parts): 800µm POWER CALIB DIF Probably need something more roust here (outside the gap)

16. MC Tile Hadron Calorimeter Felix Sefkow January 10, 2008 16 EUDET module One (or two) layers: –12 HBUs, 1728 channels Test daisy-chained readout in long and tin gap with final channel density For layer to layer integration and shower-like signal activity: Minical (12 layers, 36x36 cm 2 Use 2, 3, 4, 6 or 12 DIFs. 2 cm steel 0.5 cm active

17. MC Tile Hadron Calorimeter Felix Sefkow January 10, 2008 17 Prototyping Next: HBU prototype –Ingredients are there –SPIROC, embedded LEDs, tiles, connectors DIF prototype: –Commercial evaluation board –Separate CALIB and POWER cards –Use existing µController piggy-back –Ready to follow ECAL DIF Example SPARTAN3

18. MC Tile Hadron Calorimeter Felix Sefkow January 10, 2008 18 Conclusion SPIROC test effort broadening –Feedback to SPIROC bis and DIF design just coming in –Optimize schedule for next ASIC DIF building blocks defined –entering detailed design phase –Some decisions needed Mechanics: starting –Cassette –Absorber: re-evaluate TESLA design

19. Tile Hadron CalorimeterFelix Sefkow January 10, 200819 Back-up slides

20. MC Tile Hadron Calorimeter Felix Sefkow January 10, 2008 20 SPIROC tests Analogue part (with basic soft): –Observables: shaped signals, trigger discri out, DAC voltages –Preamp + shaper: Gain, noise, linearity (dynamic range), cross talk –Trigger: threshold scan, time walk, jitter –Both: impact of SiPM pulse shape variations –DACs (trigger threshold and SiPM bias): linearity, dispersion –Charge injection (level control?) –No hold scan (sample and hold only via SCA  digital part) Digital part (as soft comes along): –Hold scan, dispersion, effect of time walk and input shape variation –ADC and TDC linearity (int, diff) –Readout and trigger timing –Memory management, multi-channel inputs Timing with SiPM: New feature

21. MC Tile Hadron Calorimeter Felix Sefkow January 10, 2008 21 Integrated layer design Sector wall Reflector Foil 100µm Polyimide Foil 100µm PCB 800µm Bolt with inner M3 thread welded to bottom plate SiPM Tile 3mm HBU Interface 500µm gap Bottom Plate 600µm ASIC TQFP-100 1mm high Top Plate 600µm steel Component Area: 900µm high HBU height: 6.1mm (4.9mm without covers => absorber) Absorber Plates (steel) Spacer 1.7mm Top Plate fixing DESY integrated