1. Functions of Combinational Logic By Taweesak Reungpeerakul
Chapter 6
Functions of Combinational Logic
By Taweesak Reungpeerakul
CH6

2. Contents Adders Comparators Decoders Encoders Code Converters
Multiplexers
Demultiplexers
Parity Generators
CH6

3. 6.1 Basic Adders Full Adder Half Adder A B Cin SUM Cout A B SUM Cout
Half Adder
A B SUM Cout
SUM = AB
Cout = AB
SUM = ABCin
Cout = AB+(AB)Cin
CH6

4. Logic Symbol and Diagram
Half Adder
Full Adder
CH6

5. Full Adder by 2 Half Adders
SUM = ABCin
Cout = AB+(AB)Cin
AB AB
CH6

6. 6.2 Parallel Binary Adder A full adder is required for each A2A1
bit in the numbers.
A2A1
+ B2B1
S3S2S1
CH6
Question: 4-bit numbers

7. Four Adders
A B Cn-1 Sn Cn
CH6

8. IC:4-bit Parallel Adder
Example: 74LS83A (or 74LS283)
74LS83A
74LS283
Question: Show circuit diagram of
A+B by using 74LS83A. A =
and B =
CH6

9. 6.3 Comparators Inequality Equality Comparing A and B: AB
IC: 74LS85
Equality
Comparing A and B: AB
If A=B, output = 0
If A≠B, output = 1
HIGH indicates equality: AB (XNOR)
A1A0 ? B1B0 A1 A0 A2 A3 B1 B0 B2 B3
Cascading inputs
COMP
A = B
A < B
A > B 3 A B
Outputs
Question: Show circuit diagram in order to compare two 8-bit numbers by using 74LS85.
CH6

10. Two 74LS85 Cascaded Arrangement
Outputs A1 A0 A2 A3 B1 B0 B2 B3
COMP
A = B
A < B
A > B 3 A A5 A4 A6 A7 B5 B4 B6 B7
+5.0 V
LSBs
MSBs
CH6

11. 6.4 Decoders
A decoder is a logic circuit that detects the presence of a specific combination of bits at its input. A0 A0 A1
OUT A1
OUT A2 A2 A3 A3
Active HIGH decoder for 0011
Active LOW decoder for 0011
CH6

12. 4-to-16 Decoder A0 A1 A2 A3
CS1
CS2
IC: 74HC154
Question: Use 74HC154 to implement the logic in order to support a 5-bit number.
CH6

13. BCD-to-Decimal Decoder
BCD-to-decimal decoders accept a binary coded decimal input and activate one of ten possible decimal digit indications.
IC: 74HC42
Question: Assume the inputs to the 74HC42 decoder are the sequence 0101, 0110, 0011, and Describe the output. A0
Answer: All lines are HIGH except for one active output, which is LOW. The active outputs are 5, 6, 3, and 2 in that order. A1 A2 A3
Question: Write truth table of output 0.
CH6

14. BCD-to-7-Segment Decoder
IC: 74LS47
BCD Inputs (D-A)
7-segment Outputs (a -g)
Ripple Blanking Input
(RBI)
Blanking Input/Ripple Blanking Output (BI/RBO)
Lamp Test (LT)
Zero Suppression
VCC
BCD/7-seg
BI/RBO
BI/RBO
BCD inputs
Outputs to seven segment device LT LT
RBI
RBI
74LS47
GND
CH6

15. Illustration of Leading Zero Suppression
CH6

16. Illustration of Trailing Zero Suppression
CH6

17. 6.5 Encoders
An encoder accepts an active logic level on one of its inputs representing a digit, such as a decimal or octal digits, and converts it to a coded output, such as BCD or binary.
IC: 74HC to-4 encoder (decimal-to-BCD)
IC: 74F148 8-to-3 encoder 1 A0 2 3 A1 4 5 A2 6 7 8 A3 9
CH6

18. Example
Show how the decimal-to-BCD encoder converts the decimal number 3 into a BCD 0011. 1 1 1 A0 2 3 1 A1 4 5 A2 6 7 8 A3 9
CH6

19. 74HC147 Means highest value input has priority
VCC
The 74HC147 is an example of an IC encoder. It has ten active-LOW inputs and converts the active input to an active-LOW BCD output.
This device offers additional flexibility with a priority encoder.
HPRI/BCD
Decimal input
BCD output
GND
74HC147
CH6

20. A Simplified Keyboard Encoder
VCC
BCD complement of key press
Not used by this encoder but may be used by other circuits to detect the key press.
CH6

21. 6.6 Code Converters BCD-to-BIN Conversion IC: 74184
BIN-to-BCD Conversion
IC: 74185
CH6

22. Code Converters (cont.)
BIN-to-Gray
Gray-to-BIN
LSB
LSB G0 B0 B0 G0 B1 G1 G1 B1 B2 G2 B2 G2 B3 G3 G3 B3
MSB
MSB
Question: Show the conversion of binary 0111 to Gray and vice versa.
CH6

23. 6.7 Multiplexers (MUX)
A multiplexer has several data-input lines and a single output line.
It also has data-select inputs, which permit digital data on any one of the inputs to be switched to the output line.
Another name is a data selector.
IC: 74HC157 Quad 2-input MUX
IC: 74HC151 8-input MUX S0
Data
select 1 S1 D0
Data
output D1
Data
inputs D2 D3
Question: Which data line is selected if S1S0 = 10?
CH6

24. ICs
74HC157 Quad 2-input MUX
74HC151 8-input MUX
CH6

25. 6.8 Demultiplexers (DEMUX)
74LS138
A DEMUX basically reverses the multiplexing function.
It takes data from one input line and distributes to one of output lines depending on the select lines.
Another name is a data distributor.
IC: 74LS138 8-output DEMUX
Data select lines 1
Data outputs
Enable
inputs
Question: Which data output is selected if A2A1A0 = 010?
CH6

26. Example (DEMUX) Determine the outputs, given the inputs shown. A A A GA 1 A 2 G 1
Determine the outputs, given the inputs shown. G
LOW 2A G
LOW 2B Y Y
Data select lines 1 Y 2
Data outputs Y 3
Enable
inputs Y 4 Y 5 Y 6
74LS138 Y 7
CH6

27. 6.9 Parity Generators/Checkers
One method of error detections is to use parity.
A parity bit is attached to a group of data in order to make the total number of 1s either even or odd.
Example
The data is Show the parity bit for the data with odd and even parity.
Solution
data with odd parity =
data with even parity =
CH6

28. 6.9 Parity Generators/Checkers (cont.)
IC: 74LS280 9-bit parity generator/checker
(8 bits+1 parity bit)
Checker:
# of 1s on inputs ∑ Even ∑ Odd
0,2,4,6, H L
1,3,5,7, L H
74LS280
Data inputs
S Even
S Odd
Generator: To generate even parity, the parity bit is taken from the odd parity output. To generate odd parity, the output is taken from the even parity output.
CH6