1. Microcomputer Principle and Interface Technology - Introduction 计算机学院 李征 Tel ： 13882153765 Email ： lizheng@cs.scu.edu.cn lizheng@cs.scu.edu.cn OICQ: 1340915

2. Course Content Architecture and Mechanism of 8088/8086 CPU 8088/8086 Instruction System and Programming with Assembler Language Architecture and Mechanism of PC System (PC Bus) Basic I/O Interface and Basic Programming for I/O Interface

3. Content of this chapter 1. Basic architecture of microcomputer 2. Basic signals and temporal procedure in microcomputer 3. Machine instruction and assembler language

4. Essential Parts of Computer Center Process Unit BusMemory I/O Interface I/O Device Five essential parts are necessary for all computers.

5. General Architecture of Computer CPU Bus （ Data, Address, Control ） Memory I/O Interface I/O Device

6. Essential Storage Cell in Computer Register in CPU Memory Cell I/O Port (Register in I/O Interface) Three types of essential storage cell in all computers. Questions: 1. What is the main function of the bus? 2. What do our programs mainly do?

7. Address Every storage cell has an unique address. The address must be provided on the bus before a storage cell can be operated.

8. Binary Information Although we use decimal numbers in the program design, all information in computer is binary. There only two signal types in computer, which is 0 and 1. The basic unit of a storage cell is bit.

9. Basic storage unit 01 01 10 SDSD RDRD QnQn Q n+1 1100110011001100 1111000011110000 0101010101010101 0 1 0 1* RDRD SDSD QQ 11 11 10 10 维持置1置1 清0清0 非法

10. Basic storage unit

11. Basic Address Unit - Byte Byte is composed of 8 bits. In microcomputer, every unique storage cell in memory is a byte which has an unique address. Word length is the maximal bit number which CPU can process synchronously.

12. (1) Center Process Unit 80386 Pentium Pentium 4 8088CPU

13. (1) Center Process Unit (1) CPU control other parts of computer with temporal logic automatically. (2) CPU execute programs in the memory.

14. Temporal Procedure Temporal procedure is the control procedure performed step by step and orderly. Two types of temporal procedure are performed by CPU.

15. Temporal Procedure 1) Non-instruction execution: reading instruction bytes from memory, Interrupt procedure, etc. 2) Instruction execution (Program is composed of instructions stored in memory)

16. Most operations in temporal procedure reading or writing registers in CPU, memory cell, or I/O port performing arithmetic or logic operation with ALU (Arithmetic Logic Unit)

17. (2) System Bus PCI Bus ISA Bus

18. (2) System Bus Bus provide necessary signal connections between CPU, memory and I/O Interface. There are three types of bus in bus architecture, which are address bus, data bus and control bus.

19. (2) System Bus Microcomputer Architecture Control Bus (CB) Data Bus (DB) Address Bus ( AB) Bus Generator CPU Subsystem I/O Device I/O Interface Memory System Bus

20. Bus Operation in Temporal Procedure When memory cell or I/O port is to be operated, bus operation is necessary in temporal procedure. Operation of registers in CPU does not need system bus.

21. Address Bus Cell Address must be provided on address bus when cell is to be operated (reading or writing). Generally, higher part of address is for chip selection, and lower part of address is for cell selection. Address bus is unidirectional bus.

22. Data Bus When CPU write a binary data to a memory cell or I/O port, it output data signals to data bus. When CPU read a binary data from a memory cell or I/O port, it input data signals from data bus. Data bus is bidirectional.

23. Control Bus CPU send basic control signals by control bus to memory or I/O interface. (For example, RD and WR signals). I/O interface send basic status signals by control bus to CPU (For example, Interrupt signal). Observed individually, Control bus is unidirectional. As a whole, it is bidirectional.

24. (3) Memory

25. Memory is the storage center of computer. If a program is expected to be performed, it must be loaded in memory first. The instructions which form the program, and the data which used by program are all stored in memory.

26. (4) I/O Interface I/O interface is a circuit which connect the system bus and I/O device. Why there is an interface needed between bus and device? 1) Signal Difference: Signals in I/O devices is much different from signals in system bus. 2) Transfer Rate Difference: Data transfer rates of I/O device and CPU may be very different.

27. (4) I/O Interface

28. I/O Port Registers in I/O interface are called I/O ports in program design. There are three types of I/O port in interface, which are data, command, status port separately.

29. Functions of I/O Interface 1) It provides signal transformation between I/O device and system bus. 2) It provides data buffer to avoid data lost in transfer because of the transfer rate difference between device and CPU.

30. Functions of I/O Interface 3) It provides interaction ways between CPU and I/O devices. 4) It make devices can be controlled by program.

31. Signal Transformation 1) Transformation between Analog signal and Digital signal Example: Sound input and output 2) Transformation between different digital signals

32. Signal Transformation For input device, input signal is transformed to binary data, and stored in data port by interface, waiting for reading by CPU. For output device, CPU writes the output binary data into data port, waiting for outputting by interface.

33. Data Buffer For input device, if device provides an input when CPU is busy, the interface stored the input data in data port. For output device, if CPU provides an output when interface is busy, the interface stored the output data in data port.

34. Interaction between I/O interface and CPU 1) CPU send commands to interface with command port. For example: Setting the operation mode of interface or device

35. Interaction between I/O interface and CPU 2) CPU check the status of the interface with status port. For example: CPU check the input status to know if there is input data in data port. CPU check the output status to know if the output data in data port has been outputted.

36. Interaction between I/O interface and CPU 3) Interrupt (active status) For example: If there is input data in data port, interface send interrupt signal to CPU.

37. Programmable Interface CPU interacts with I/O interface by I/O port operations (mostly by I/O instructions). Generally, these I/O port operations are performed orderly and logically. If we make a program to perform these I/O port operations, this program is called a driver.

38. (5) I/O Device

39. Content of this chapter 1. Basic architecture of microcomputer 2. Basic signals and temporal procedure in microcomputer 3. Machine instruction and assembler language

40. Basic Signals Clock (CLK, sent by Clock Generator) Read (RD, sent by CPU) Write (WR, sent by CPU) Chip Select (CS, generated on Address Bus) Interrupt (INT, sent by interface) Interrupt Acknowledge (INTA sent by CPU)

41. Clock Clock: A periodic signal sent by clock generator, its cycle is called clock cycle （时钟周期，节拍）. The clock signal is necessary for CPU temporal procedure. The clock cycle is the basic time unit in temporal procedure.

42. Clock T time

43. Clock Any temporal procedure is composed of multiple clock cycles. The clock cycle also used to describe the process speed of CUP. Shorter cycle implied faster processing.

44. Read and Write The bus operations (temporal procedure with system bus) performed by CPU can be summarized as reading and writing. When CPU expect to read or write a memory cell or I/O port, it sends read or write signal to control bus.

45. Reading and Writing Cycle The time consumed in reading or writing procedure is always composed of multiple clock cycles. The time consumed in reading or writing procedure is called reading or writing cycles.

46. Chip Select When CPU expect to read or write a cell outside, cell address must be provided on the address bus. The address decoder (on address bus or in chips) decode the higher part of cell address to generate chip select signal. Chip select signal is used to select memory chip or I/O interface chip, and the lower part address is used to locate the cell.

47. Address Decoder Input ： n Output ： <=2 n

48. Chip Select Important: Only when chip select is valid for a chip, the cells in it can be operated.

49. Interrupt and Interrupt Acknowledge When an input device expect transfer input data to CPU or an output device expect output data from CPU, it can send interrupt signal to CPU with control bus.

50. Interrupt and Interrupt Acknowledge If interrupt acknowledge of CPU is allowed, and when the current instruction has been finished by CPU, CPU send interrupt acknowledge signal to I/O interface.

51. Interrupt and Interrupt Acknowledge If CPU does not accept the interrupt, the I/O interface maintain the interrupt on control bus until CPU accept it.

52. Interrupt Acknowledge Cycle The temporal procedure of interrupt acknowledge is complex. The time consumed in interrupt acknowledge procedure is called interrupt acknowledge cycle.

53. Temporal Procedure Temporal procedure is the control procedure (signal interaction procedure) performed step by step and orderly. Clock cycle is the basic time unit of temporal procedure, and each cycle finish a single step.

54. Temporal Procedure Example: Memory Reading Cycle T1 cycle : CPU put cell address on address bus, and the address decoding begins. T2 cycle: CPU send RD signal to control bus, and the CS (chip select) is valid.

55. Temporal Procedure T3 cycle: RD, address, and CS are all stable, and the data in memory cell is put on data bus. T4 cycle: Data on bus is stable, and CPU read it from the data bus.

56. Content of this chapter 1. Basic architecture of microcomputer 2. Basic signals and temporal procedure in microcomputer 3. Machine instruction and assembler language

57. Machine Instruction Machine instruction is a sort of binary code. Its code is corresponding with its function. All instructions supported by a CPU type form the instruction system of this CPU type.

58. Instruction Reading Cycle Originally, instructions are stored in memory cells. Before an instruction can be executed, it must be loaded in the CPU.

59. Instruction Reading Cycle The time consumed in reading instruction is called instruction reading cycle. Instruction reading cycle is executed by CPU automatically.

60. Instruction Executing Cycle When an instruction is loaded in CPU, CPU executed it automatically. The time consumed in instruction execution is called instruction executing cycle.

61. Instruction Executing Cycle 1) Instruction code is decoded (by instruction decoder) and all relative control signals are generated. 2) Based on the temporal logic provided by this instruction, control signals are send to bus step by step.

62. Instruction Executing Cycle When current instruction has been executed, and there is no instructions in CPU for execution, CPU automatically enter instruction reading cycle.

63. Some Problems Now, with the concept of instruction, what does CPU do all the time? Can program control when CPU read its instructions or execute them? So what can program control? Read and execute instructions one by one No, these temporal procedures are executed by CPU automatically. Temporal procedure prescribed by instruction

64. Atom Property of Instruction (1) Generally, the execution of instruction can not be disturbed. (except DMA request) When interrupt occurs, CPU will finish current instruction execution before it can accept interrupt.

65. Atom Property of Instruction (2) For temporal procedure in one single instruction, if it is executed, it must be executed integrally. An instruction may be executed integrally or may not be executed. But it can not be executed partly.

66. Instruction System In different CPU types, instruction decoders are different. So, instruction code, and temporal procedure of instruction are also different in different CPU types.

67. Assembler Instruction Machine instructions are binary codes, and they are difficult for programmers to remember. Assembler instruction is the character code of machine instruction. Because its clear meaning, assembler instruction is easy to remember.

68. Assembler Instruction For example: MOV : This instruction move data in one cell (register or memory cell) to the other. ADD : This instruction add data in one cell with the other.

69. Assembler Language Example: x, y, and z are three variables. If x+y-z>0, store the calculation result in variable var1; or else, store zero in var1. C program: if((var1=x+y-z)<=0) var1 = 0; if((var1=x+y-z)<=0) var1 = 0;

70. Feature of C program (1) simple, easy to read (2) can not observe the machine operation with this program

71. Assembler Language Assembler program: mov al, x mov al, x add al, y add al, y sub al, z sub al, z ja l1 ja l1 jmp l2 jmp l2 l1: mov var1, al jmp l3 jmp l3 l2: mov var1, 0 l3: ……

72. Feature of assembler program (1) complex, difficult to read (2) One instruction in one line, easy to understand the machine operation (3) Because use instructions directly in program, temporal and spatial efficiency is great.

73. Assembler program vs. C program 程序设计语言可执行程序占用字节数 高级语言 （ C ） CSUM.EXE4330 汇编语言 （ MASM ） ASMSUM.COM21 机器语言 （ IBM PC ） MACHINE.COM21

74. High-level Language Application oriented Easy to learn Development cycle is short Good portability Less efficient

75. Low-level Language Machine oriented Hard to learn Development cycle is long Bad portability More efficient

76. Assembler Language Based on assembler instruction system, assisted by other syntax, assembler language is a low-level and machine oriented language.

77. Why learn Assembler Language? (1) Because most temporal procedures are caused by instructions, understanding assembler language is basic and necessary to learn machine operation.

78. Why learn Assembler Language? (2) program analysis without source code (3) obtain most efficient design

79. Notation System in Assembler Language Decimal: 352 Binary: 10110011B Octal: 3765O Hex: 2A4FH

80. Data Code in Assembler Language Unsigned number: For byte, its range is 0~255 For word, its range is 0~65535 Complementary code (Signed number): For byte, its range is -128~127 For word, its range is -32768~32767

81. Complementary Code ( 补码 ) [X] 补 = M+X [X] 补 = M+X M=2 n M=2 n n is the binary data length n is the binary data length

82. Complementary Code ( 补码 ) The complementary code of positive integer and zero is the data itself. Example: [+59] 补 = 2 8 + 00111011 = [+59] 补 = 2 8 + 00111011 = 100000000 + 00111011 = 1 （舍去） 00111011 （ 8 位以内的部分为 补码） 1 （舍去） 00111011 （ 8 位以内的部分为 补码）

83. Complementary Code ( 补码 ) However, the complementary code of negative integer is very different from the data. Example: [-59] 补 = 2 8 + （ -00111011 ） = 100000000 - 00111011 = 11000101

84. Complementary Code ( 补码 ) [A] 补 +[-A] 补 = [0] 补 Example: [+59] 补 +[-59] 补 = 00111011+11000101 = 100000000 = 2 8 100000000 = 2 8

85. Fast Calculation of Complementary Code Example: 真值： - 01011001 相反数： 01011001 变反： 10100110 加 1 ： 10100111

86. Fast Calculation of Complementary Code 验算： 01011001+10100111 = 0 （舍去第 8 位） 验算过程解释： 01011001 （正数补码） + 10100110 （值变反的结果） +1 = 11111111+1 验算过程解释： 01011001 （正数补码） + 10100110 （值变反的结果） +1 = 11111111+1

87. Fast Calculation of Complementary Code 总结变反加 1 方法可用的场合： 1 ） Obtain complementary code of negative data ( 求负数真值对应的补码 ) 2 ） Obtain data of negative complementary code ( 求负数补码对应的真值 ) 3 ） Obtain contrary complementary code ( 求 已知补码的相反数补码 )

88. Complementary Code ( 补码 ) [X] 补 +[Y] 补 = [X+Y] 补 [X] 补 -[Y] 补 = [X] 补 +[-Y] 补 = [X-Y] 补

89. Complementary Code ( 补码 ) Subtraction operation is not needed in ALU: Addition ： [X] 补 +[Y] 补 Subtraction ： [X] 补 -[Y] 补 =[X] 补 +[-Y] 补

90. Sign Expanding The sign bit of complementary code can be expanded without limit. Example: 0010 => 0000 0000 0010 1111 => 1111 1111 1111

91. Multiple explanation of data code Example: (AL) = 00000010B (BL) = 11111111B ADD AL, BL

92. Multiple explanation of data code 00000010 00000010 + 11111111 1 00000001 Explanation of unsigned number: 2+255 = 257 Explanation of Complementary Code: 2+(-1) = 1

93. Reference 8086/8088 系列微型计算机 宏汇编语言程序设计， 电子科技大学出版社， 王正智 苟大举 徐洁 黄海 于 编著 汇编语言程序设计 —— 从 DOS 到 Windows ， 清华 大学出版社， 张雪兰 等编著 16 / 32 位微机原理、汇编语言及接口技术， 机械 工业出版社， 钱晓捷、陈涛编著