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MRF & Cosylab on timing system: integration support Joze Dedic the best people make cosylab … Head of Hardware.

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Presentation on theme: "MRF & Cosylab on timing system: integration support Joze Dedic the best people make cosylab … Head of Hardware."— Presentation transcript:

1 MRF & Cosylab on timing system: integration support Joze Dedic (joze.dedic@cosylab.com)joze.dedic@cosylab.com the best people make cosylab … Head of Hardware

2 Positioning, wrt timing systems Cosylab provides support on the system-integration level …and (unlike MRF) we are not focused on the timing transmission layer  Jukka/MRF remains essential part we understand very well how the EVR and EVG work and we know how to add accelerator specific logic  still hard real-time …but we are also soft  providing drivers or application level SW Cosylab 2010

3 …to be on the same page about system integration and our role Cosylab 2010

4 Let’s talk dimensions Cosylab 2010 terminology timing event, transmission rate, clock, time, resolution, jitter, accuracy, time-stamping, response rate, delay propagation compensation… event, data and payload delay compensation strategy PTP (IEEE1588), equal fiber length,... automatic delay compensation data distribution protocol and priorities RT data bus timing domain knowledge huh?

5 Let’s talk dimensions Cosylab 2010 timing domain knowledge “hardware” dedicated FPGA, must have VHDL timing-receiver code special devices, tightly integrated in timing system SW drivers add IOs for HW triggers (for dummy devices) small add-on to basic FPGA FW code PCB layout; board design is not trivial anymore, and costly VME, PXI… target platform FPGA FW code not complex prototype (Xilinx dev board for <$500) 8b/10b, fiber link FPGA + SFP

6 Let’s talk dimensions Cosylab 2010 timing domain knowledge “hardware” integration know-how tests, documentation, support, training… (straightforward) implementation slaves; RT part; FPGA,SW part; integrate with “simple” devices, tightly embed with complex devices master; RT part; FPGA, SW part configure hardware (access to the implementation source code, FPGA expert, low-level SW expert…) virtual accelerators, execution slots, deliver user data sync with (patient) breathing, linac grid… sync with mains (but… not too fast for choppers, etc…) machine physics, accelerator/machine specific requirements

7 Let’s talk dimensions Cosylab 2010 “hardware” timing domain knowledge integration know-how

8 So… we “live and breath” in the third axis, providing help with system integration.  but for sure, we understand the whole cube Cosylab 2010 “hardware” timing domain knowledge integration know-how

9 MedAustron MedAustron centre for ion-therapy and research Complete timing system Cosylab 2010

10 MedAustron timing Cosylab 2010 1x MRF EVG n-x MRF EVR REDNET = real-time event and data network requirement analysis, architecture design development, testing…  FPGA  LV driver (complete development framework)… MRF network

11 MA; EVG++ VAcc (ExecSlots), multiple tables; 256 entries, relative delay all tables synced to internal time grid (VAcc specific offset) command / data / XML real time data distro to receiver clients (all per ES) asynchronous events priorities automatic heart beat generation Cosylab 2010

12 MA; Receiver side digital/optical signals on the MRF EVR outputs distribute events to clients (neighbor PXI cards) trigger clients (neighbor PXI cards) software IRQ (LV Vis) time stamping support distribute reference clock (10 MHz GPS) Cosylab 2010

13 MA; EVR++ (flex. outputs) Cosylab 2010 4 aux outputs 7 start trigger lines 8 backplane trigger bus PCI IRQ; VIs delay propagation compensation fully flexible output configuration concurrent response generation all events can map to any of the 16 different settings: pulse, delay, width, toggle/pulse (per output, per event) …but still optimized for resource usage

14 ORNL SNS Spallation neutron source Timing master renovation Cosylab 2010

15 SNS in the period 2008-2010 we cooperated on SNS timing system renovation old HW (several VME crates) moved to single Virtex 5 LX- 50 requirements, architecture, development, testing did not touch transfer layer, only the master Cosylab 2010

16 SNS; Event Link (EL) Cosylab 2010

17 SNS; catching mains Cosylab 2010 complete timing operation breathes with mains and waits for choppers (rotation inertia) synthesizing ~60 Hz (50  Hz) to follow mains + PID regulator

18 and others… We can help you time your machine. Cosylab 2010 And we can save you time.

19 Our role MRF support with customization FPGA or drivers customizing timing system to the specific machine specially for new machines and upgrades:  requirements gathering  help define conceptual solution  granularity windows, event/payload/data scheme, integrating target devices, concept of virtual accelerators, priorities  take over architectural design; FPGA, drivers… and even complete timing SW support framework  implementation, testing Cosylab 2010

20 MPS on MRF use MRF for  robust real-time data distro  nodes time sync (post mortem…) we were showing a demo @ PCaPAC 2010 Cosylab 2010 generic part; capture inputs, respond locally/globally (data distro) IOs can should be modular logic (in/out relation) should be configurable

21 Cosylab 2010 …time out.


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