1. Analysis of Verification System using SoC Platform Communication Circuit & System Design Lab., Dept. of Computer and Communication Engineering, Chungbuk National University, Korea

2. Contents Introduction What is SoC? SoC Applications Benefits of using SoC Core technology Today’s SoC design challenges Platform based design methodology What is platform for SoC? Developing platform Verification issues and our proposed verification flow Case study: IEEE 802.11a Verification result Conclusion Extra: SoC design in Mongolia

3. What is SoC? CPUROM RAM ASIC System bus System on Board System on Chip CPU RAM ROM ASIC DSP PLD DSP PLD

4. SoC Applications Communication Digital cellular phone Networking Computer PC/Workstation Chipsets Consumer Game box Digital Camera

5. Benefits of using SoC Reduced size Reduced overall system cost Lower power consumption Increased performance

6. Core technology High Speed& Low Power Design IP Development System Architecture SoC Verification Embedded Software SoC design

7. SoC design challenges and problems Time-to-market Process roadmap acceleration Consumer of electronic devices Silicon Complexity Heterogeneous processes Billion Transistors, Deep submicron effects : crosstalk, wire delays, electro migration, mask costs Design Complexity µCs, DSPs, HW/SW, SW protocol stacks, RTOS’s, digital/analog IPs, On-chips buses System-level architecture Time-in-market Performance/Energy/Cost tradeoff Scalable architecture with unified design environment

8. How to Conquer the Complexity? Reuse a known real entity ( Platform based design ) A pre-designed component (IP reuse) A platform (architecture reuse) Partition Based on functionality Hardware and software Modeling At different level Consistent and accurate

9. Platform based design methodology Hardware platform: Basic micro-architecture consists of programmable cores, input-output (I/O) subsystems, buses and memories. Software platform: Basic programmable cores and memory subsystem via a real-time operating system (RTOS), I/O subsystems via the Device Drivers and network connection via network communication subsystem. Application platform interface (API) Interface between HW/SW platforms System platform HW/SW platforms and API are system platform.

10. Effects of platform based design methodology in SoC design Complexity is drastically decreased SoC platform intend to become fully programmable cores Designer prefers SW design way than HW design

11. Effects of platform based design methodology in SoC design But 60 % to 80 % of design effort is now dedicated for verification task Code Verify (40~60%)SynthesisP/R Verify (60~80%)SynthesisP/R 2000 300K gates 1M gates 2004

12. Verification issues In order to resolve the verification bottleneck, researchers use several verification methods Informal (design review, code inspection …) Dynamic (simulation based, prototyping, emulation …) Static (formal, model checker …)

13. Emulation based co-verification flow vs. conventional flow A. Conventional verification flowB. Emulation based co-verification flow

14. Emulation based verification system In general, HW design accelerated on FPGA, SW design accelerated on processor models. So emulation based verification system is significantly affected from processor model. There are three basic model of processor: SpeedDebuggingAccuracyCost ISS model LowHigh Depend on model Low RTL model LowHigh Low Physical Model HighLowVery highHigh

15. Verification models We assume: case “a” is the best case for HW, case “b” is the best case for SW case “c” is the best case for system design verification of functionality.

16. Case study: IEEE 802.11a IEEE 802.11 family 802.11b: physical layer uses Direct Sequence Spread Spectrum (DSSS) or Frequency Hopping (FH), operates at 2.4GHz, 11Mbps bit rate 802.11a: uses orthogonal frequency-division multiplexing between 5GHz and 6GHz, up to 54Mbps bit rate 802.11g: operates at 2.4GHz up to 54Mbps bit rate Those protocols specify MAC and PHY layers of wireless network model.

17. Case study: IEEE 802.11a DCF is fundamental access method of the MAC The DCF shall be implemented in all STA The brief definition of DCF that: Carrier sense multiple access with collision avoidance (CSMA/CA) IEEE 802.11a MAC specification is a 500 pages

18. Case study: IEEE 802.11a Broadband communication systems using Orthogonal Frequency Division Multiplex (OFDM) 5 GHz band with Data rates ranging from 6-54 mbit/s. IEEE 802.11a PHY specification is a 300 pages

19. Case study: IEEE 802.11a IEEE 802.11a specification System modeling on MATLAB&Simulink HW/SW partition MAC as SW (C/C++) PHY as HW (VHDL) Compiled with Visual C 6.0, ADS 1.2 Synthesized with Leonardo Spectrum

20. Case study: IEEE 802.11a a) MAC Implemented functions: Data -> MPDU generation & MPDU -> Data generation DCF Fragmentation&Defragmentation CRC checking Code size: ~2000 line b) PHY (fully implemented) Code size: ~1M gate (“Implementation and verification of MAC processor for WLAN on a SOC platform” paper presented on The International SoC Design Conference (ISOCC) in Seoul, COEX in November, 2004)

21. Emulation system platform Multi-ICE ARM Core Module ARM Base Board DPP iPROVE (FPGA card) HOST PC 1.Matlab&Simulink 2.ISS (Armulator) 3.Modelsim JTAG RS232 PCI MAC 5/23 PHY

22. Emulation system models 5/23 a. Pure C/C++ b. ISS c. Pure engine

23. Verification result 5/23 Speedup : log(speedup)

24. Verification result 5/23

25. Conclusion Advantages: Co-verification is successfully performed in few weeks Very high verification performance Communication interface is significantly affect whole performance

26. Conclusion PerformanceCost Pure CAD toolsVery lowLow SW design CAD tools, HW accelerator High SW design on physical model, HW design on CAD Low (depend on HW design size)Medium Pure physical model Very high (depend on communication interface) Very high

27. Reference http://www.dynalith.com/2003/document/SuccessStory_IEEE802.11a_CBU.pdf

28. Extra: SoC design in Mongolia SoC дизайн Үйлдвэрлэл& автоматжуулалт Их сургууль &эрдэм шинжилгээний институт