1. ©2008 Avanex, Inc. All rights reserved.1 WISDOM bi-quaterly meeting Cork, Ireland Intelligent Photonic Solutions ™ F.Doukhan F.Dinallo M.Omar January 15th, 2009

2. ©2008 Avanex, Inc. All rights reserved.2 Platform Design Use of a single PCB platform design to drive different building blocks –MZI –Switch –Optional pattern generator One PCB can drive 2 independent MZI or one switch Use of USB interface to // boards (up to 10) Two configurations are set up –One 2x2 switch + pattern generator –2 MZI µC MZ2 MZ1 USB 2x2 switch OR Pattern generator

3. ©2008 Avanex, Inc. All rights reserved.3 Board Dimensions

4. ©2008 Avanex, Inc. All rights reserved.4 Board Equipment

5. ©2008 Avanex, Inc. All rights reserved.5 Platform Sample: MZI MZI SOA Drivers µC Power supply TEC DRV MZI Heater Drivers MZI 26 pins socket USB Board supply connectors

6. ©2008 Avanex, Inc. All rights reserved.6 MZI SOA Source Requirement Typical values –output current up to 500 mA –output voltage up to 5 V –Current resolution< 1mA (#0.2mA) µC DAC ADC SOACurrentSetSOACurrentSet SOACurrentSe nse SOA DRIV ER SOAVoltageSe nse SOA Enable/Disable status

7. ©2008 Avanex, Inc. All rights reserved.7 MZI Heater Source Requirement Typical values –output current up to 150 mA –output voltage up to 15 V –Current resolution < 1 mA (#0.1mA) DAC ADC Heater Current Set Or Heater Voltage set HeaterCurrentSense HEATER DRIV ER HeaterVoltageSense Heater Enable/Disable status µC

8. ©2008 Avanex, Inc. All rights reserved.8 TEC Source Requirement Typical values –output current< 3 A –output voltage< 5 V –temperature stability<0.5° –temperature settable10°C to 50°C µC DRI VER DAC ADC P el ti er C ur re nt S et PeltierCurrentSense Peltier Rth Analog_Peltier _ TempS ense PeltierVoltageSense Temperature_SetTemperature_Set PID Digital_Peltier _ TempSe nse TEC Enable/Disable status

9. ©2008 Avanex, Inc. All rights reserved.9 Platform Sample: Pattern Generator/Switch µCTEC DRV Power supply Pattern Generator Delay lines Switch Driver USB Board supply connector Pattern detect input Switch input command Pattern generator outputs / sync

10. ©2008 Avanex, Inc. All rights reserved.10 Switch SOA Source (static) Requirement Typical values –output current up to 150 mA –output voltage up to 5 V –Current resolution< 1mA (#0.1mA) µC DAC ADC SOACurrentSetSOACurrentSet SOACurrentSe ns e SOA DRIV ER SOAVoltageSe nse SOA Enable/Disable status Re sist or 50 Oh ms RF ECL input shifted, DC coupled

11. ©2008 Avanex, Inc. All rights reserved.11 Switch SOA Source (dyn.) SOA cathode reference to -1.3V Source test loaded by a resistive load Rise Time 10%-90% : 650ps Fall Time 10%-90% : 440ps Rise Time 10%-90% : 620ps Fall Time 10%-90% : 440ps

12. ©2008 Avanex, Inc. All rights reserved.12 Switch SOA Source (dyn.) First results collected electrical to optical donnot match with the validation results.

13. ©2008 Avanex, Inc. All rights reserved.13 Switch SOA Source (dyn.) Small signal analysis of SOA give reduced BW (using a serial 47  resistor)

14. ©2008 Avanex, Inc. All rights reserved.14 Pattern Generator Programmable pattern: 8/16/32 Max frequency: 200MHz LVPECL shifted (50  to gnd) Rise/fall time output voltage < 160 ps incremental delay per steps : <40ps Total Delay Change : >8ns Target pattern DC coupled < 200 MHZ 8 /16/ 32 bits circular registers & electronic control Pattern triger < 200 MHZ µC Delayed initialising pulse DC coulped < 200 MHZ Driver Electronic system control EC L OU TP UT TE CH NO LO GY SH IF TE D Target bit rate AC couoled ; Vpp = 500 mv Load target N bits Delayed Reset pulse DC coulped < 200 MHZ Delayed Output gate DC coulped < 200 MHZ Delayed Input data select control DC coulped < 200 MHZ

15. ©2008 Avanex, Inc. All rights reserved.15 Pattern Generator Output Recorded with high speed oscilloscope –Pattern is 0x80h 0xFCh 0xC8h 0xA8h

16. ©2008 Avanex, Inc. All rights reserved.16 Pattern Generator Pulse Recorded with high speed oscilloscope

17. ©2008 Avanex, Inc. All rights reserved.17 Pattern Generator Output Recorded with low bandwidth scope (100MHz) Load (yellow) Clock (blue) Data (pink) 0x8Eh Sync (green) 000 0 1 111

18. ©2008 Avanex, Inc. All rights reserved.18 Pattern Generator Length 8 bit pattern 0xA8h 16bit pattern 0xC8h 0xA8h 32bit pattern 0x80h 0xFCh 0xC8h 0xA8h

19. ©2008 Avanex, Inc. All rights reserved.19 Pattern Sync. Delay Delay can be adjusted by 10ps increment Delay can be set up to 10ns J12 J10 J9 J8 0ps, 3000ps, 6000ps, 9000ps 0ps, 8000ps, 2000ps, 5000ps

20. ©2008 Avanex, Inc. All rights reserved.20 FW validation DLL validation almost completed –Validation is done simultaneously with HW validation GUI validation is going to start

21. ©2008 Avanex, Inc. All rights reserved.21 Delivery program One board with SWITCH equipment to be shipped late January –Adjustment on tr/tf –Use of dll and GUI Need to validate MZI equipped version with MZI device –All functions validated –Need to get a MZI device for board validation Delivery of next units can start from six week after validation is completed –Need to be discussed

22. ©2008 Avanex, Inc. All rights reserved.22 ADVA and the ADVA logo are registered trademarks of ADVA Optical Networking. Alcatel and the Alcatel logo are a registered trademarks of Compagnie Financière Alcatel. CIENA and the CIENA logo are registered trademarks of CIENA Corporation. Cisco and the Cisco logo are registered trademarks of Cisco Systems, Inc. Fujitsu and the Fujitsu logo are registered trademarks of Fujitsu Limited. Huawei and the Huawei logo are registered trademarks of Huawei Technologies Co., Ltd. Lucent and the Lucent logo are registered trademarks of Lucent Technologies, Inc. Marconi and the Marconi logo are registered trademarks of Marconi Corporation plc. Nortel and the Nortel logo are registered trademarks of Nortel Networks Limited. Siemens and the Siemens logo are registered trademarks of Siemens AG. Tellabs and the Tellabs logo are registered trademarks of Tellabs. Zhone and the Zhone logo are registered trademarks of Zhone Technologies. ZTE and the ZTE logo are registered trademarks of ZTE Corporation. Thank You