Presentation is loading. Please wait.

Presentation is loading. Please wait.

Sequential Circuit Design. Outline  Flip-flop Excitation Tables  Sequential Circuit Design  Design: Example #1  Design: Example #2  Design: Example.

Published byAshlee Rose Modified over 9 years ago

Similar presentations

Presentation on theme: "Sequential Circuit Design. Outline  Flip-flop Excitation Tables  Sequential Circuit Design  Design: Example #1  Design: Example #2  Design: Example."— Presentation transcript:

1 Sequential Circuit Design

2 Outline  Flip-flop Excitation Tables  Sequential Circuit Design  Design: Example #1  Design: Example #2  Design: Example #3  Design of Synchronous Counters

3 Outline  Flip-flop Excitation Tables  Sequential Circuit Design  Design: Example #1  Design: Example #2  Design: Example #3  Design of Synchronous Counters

4 Flip-flop Excitation Tables  Analysis: Starting from a circuit diagram, derive the state table or state diagram.  Design: Starting from a set of specifications (in the form of state equations, state table, or state diagram), derive the logic circuit.  Characteristic tables are used in analysis.  Excitation tables are used in design.

5 Flip-flop Excitation Tables  Excitation tables: given the required transition from present state to next state, determine the flip-flop input(s). JK Flip-flopSR Flip-flopD Flip-flopT Flip-flop

6 Outline  Flip-flop Excitation Tables  Sequential Circuit Design  Design: Example #1  Design: Example #2  Design: Example #3  Design of Synchronous Counters

7 Sequential Circuit Design  Design procedure:  Start with circuit specifications – description of circuit behavior.  Derive the state table.  Perform state reduction if necessary.  Perform state assignment.  Determine number of flip-flops and label them.  Choose the type of flip-flop to be used.  Derive circuit excitation and output tables from the state table.  Derive circuit output functions and flip-flop input functions.  Draw the logic diagram.

8 Outline  Flip-flop Excitation Tables  Sequential Circuit Design  Design: Example #1  Design: Example #2  Design: Example #3  Design of Synchronous Counters

9 Design: Example #1  Given the following state diagram, design the sequential circuit using JK flip-flops. 00 10 11 0 0 0 0 1 1 1 1 01

10 Design: Example #1  Circuit state/excitation table, using JK flip-flops. 00 10 11 0 0 0 01 11 1 01 0 X 1 X X 1 X 0 0 X 1 X X 0 X 1 JK Flip-flop’s excitation table. 0 X 1 X 0 X X 0 X 1

11 Design: Example #1  Block diagram. Combinational circuit A' A B B' x KAJAKBJB BB’AA’ External input(s) CP External output(s) (none) J QQ' KJ Q K What are to go in here?

12 Design: Example #1  From state table, get flip-flop input functions.

13 Design: Example #1  Flip-flop input functions. JA = B.x'JB = x KA = B.xKB = (A  x)'  Logic diagram: x B A CP J QQ' KJ Q K

14 Outline  Flip-flop Excitation Tables  Sequential Circuit Design  Design: Example #1  Design: Example #2  Design: Example #3  Design of Synchronous Counters

15 Design: Example #2  Design, using D flip-flops, the circuit based on the state table below. (Exercise: Design it using JK flip-flops.)

16 Design: Example #2  Determine expressions for flip-flop inputs and the circuit output y. DA(A, B, x) =  m(2,4,5,6) DB(A, B, x) =  m(1,3,5,6) y(A, B, x) =  m(1,5)

17 Design: Example #2  From derived expressions, draw logic diagram: DA = A.B' + B.x' DB = A'.x + B'.x + A.B.x' y = B'.x D Q Q' D Q A A' B B' y CP x

18 Outline  Flip-flop Excitation Tables  Sequential Circuit Design  Design: Example #1  Design: Example #2  Design: Example #3  Design of Synchronous Counters

19 Design: Example #3  Design with unused states. Given theseDerive these Unused state 000:

20 Design: Example #3  From state table, obtain expressions for flip-flop inputs.

21 Design: Example #3  From state table, obtain expressions for flip-flop inputs (cont’d).

22 Design: Example #3  From derived expressions, draw logic diagram: SA = B.xSB = A'.B'.xSC = x' RA = C.x'RB = B.C + B.x'RC = x y = A.x A A' B B' y CP x S Q Q'R S Q R S Q R C

23 Outline  Flip-flop Excitation Tables  Sequential Circuit Design  Design: Example #1  Design: Example #2  Design: Example #3  Design of Synchronous Counters

24 Design of Synchronous Counters  Counter: a sequential circuit that cycles through a sequence of states.  Binary counter: follows the binary sequence. An n-bit binary counter (with n flip-flops) counts from 0 to 2 n -1.  Example 1: A 3-bit binary counter (using T flip-flops). 001 000 111 010 011 100 110 101

25 Design of Synchronous Counters  3-bit binary counter (cont’d). TA 2 = A 1.A 0 A2A2 A1A1 A0A0 1 1 TA 1 = A 0 TA 0 = 1 A2A2 A1A1 A0A0 1 11 1 A2A2 A1A1 A0A0 111 1111 1

26 Design of Synchronous Counters  3-bit binary counter (cont’d). TA 2 = A 1.A 0 TA 1 = A 0 TA 0 = 1 1 A2A2 CP T Q T Q T Q A1A1 A0A0

27 Design of Synchronous Counters  Example 2: Counter with non-binary sequence: 000  001  010  100  101  110 and back to 000 001 000 010 100 110 101 JA = BJB = CJC = B' KA = BKB = 1KC = 1

28 Design of Synchronous Counters  Counter with non-binary sequence (cont’d). JA = BJB = CJC = B' KA = BKB = 1KC = 1 CP A 1 J QQ' KJ Q KJ Q K BC 001 000 010 100 110 101 111 011

Download ppt "Sequential Circuit Design. Outline  Flip-flop Excitation Tables  Sequential Circuit Design  Design: Example #1  Design: Example #2  Design: Example."

Similar presentations

CS1104 – Computer Organization

CS1104 – Computer Organization
State-machine structure (Mealy)

State-machine structure (Mealy)
COE 202: Digital Logic Design Sequential Circuits Part 3

COE 202: Digital Logic Design Sequential Circuits Part 3
Sequential Circuits1 DIGITAL LOGIC DESIGN by Dr. Fenghui Yao Tennessee State University Department of Computer Science Nashville, TN.

Sequential Circuits1 DIGITAL LOGIC DESIGN by Dr. Fenghui Yao Tennessee State University Department of Computer Science Nashville, TN.
Synchronous Sequential Logic

Synchronous Sequential Logic
CS2100 Computer Organisation

CS2100 Computer Organisation
Sequential Design Part II. Output A(t+1) =D A = AX + BX B(t+1) =D B = AX Y = AX + BX.

Sequential Design Part II. Output A(t+1) =D A = AX + BX B(t+1) =D B = AX Y = AX + BX.
Sequential Logic Design with Flip-flops

Sequential Logic Design with Flip-flops
Registers.1. Register  Consists of N Flip-Flops  Stores N bits  Common clock used for all Flip-Flops Shift Register  A register that provides the.

Registers.1. Register  Consists of N Flip-Flops  Stores N bits  Common clock used for all Flip-Flops Shift Register  A register that provides the.
Sequential Logic Design

Sequential Logic Design
CSCE 211: Digital Logic Design

CSCE 211: Digital Logic Design
Sequential Circuits Problems(I) Prof. Sin-Min Lee Department of Mathematics and Computer Science Algorithm = Logic + Control.

Sequential Circuits Problems(I) Prof. Sin-Min Lee Department of Mathematics and Computer Science Algorithm = Logic + Control.
ECE 331 – Digital System Design Counters (Lecture #19) The slides included herein were taken from the materials accompanying Fundamentals of Logic Design,

ECE 331 – Digital System Design Counters (Lecture #19) The slides included herein were taken from the materials accompanying Fundamentals of Logic Design,
ECE 301 – Digital Electronics Introduction to Sequential Logic Circuits (aka. Finite State Machines) and FSM Analysis (Lecture #17)

ECE 301 – Digital Electronics Introduction to Sequential Logic Circuits (aka. Finite State Machines) and FSM Analysis (Lecture #17)
ECE 331 – Digital Systems Design Introduction to Sequential Logic Circuits (aka. Finite State Machines) and FSM Analysis (Lecture #19)

ECE 331 – Digital Systems Design Introduction to Sequential Logic Circuits (aka. Finite State Machines) and FSM Analysis (Lecture #19)
1 Synchronous Sequential Circuit Analysis. 2 Synchronous Sequential Circuit State Memory – A set of n edge-triggered flip-flops that store the current.

1 Synchronous Sequential Circuit Analysis. 2 Synchronous Sequential Circuit State Memory – A set of n edge-triggered flip-flops that store the current.
MOHD. YAMANI IDRIS/ NOORZAILY MOHAMED NOOR1 Sequential Circuit Design.

MOHD. YAMANI IDRIS/ NOORZAILY MOHAMED NOOR1 Sequential Circuit Design.
ECE 320 Homework #6 Derive the state table and state diagram of the sequential circuit of the Figure below. What is the function of the circuit? A’ A.

ECE 320 Homework #6 Derive the state table and state diagram of the sequential circuit of the Figure below. What is the function of the circuit? A’ A.
Digital Computer Design Fundamental

Digital Computer Design Fundamental
1 Chapter 5 Synchronous Sequential Logic 5-1 Sequential Circuits Every digital system is likely to have combinational circuits, most systems encountered.

1 Chapter 5 Synchronous Sequential Logic 5-1 Sequential Circuits Every digital system is likely to have combinational circuits, most systems encountered.

Similar presentations

Ads by Google