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AUP2G57 configured as flip flop Dual Configurable Logic Design Contest.

Published byEdwin Stanley Modified over 9 years ago

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Presentation on theme: "AUP2G57 configured as flip flop Dual Configurable Logic Design Contest."— Presentation transcript:

1 AUP2G57 configured as flip flop Dual Configurable Logic Design Contest

2 Circuit Schematics

3 Make your own flip flop A SPDT switch is used to toggle one input of each NOR gate high or low in AUP2G57 device The two NOR gates are configured as a flip flop. SPDT switch is used to supply positive logic level to respective NOR gate, which makes the output of other NOR gate go high turning ON the LED connected to it The LED that lights up, keeps lit even if 3V positive logic level is removed from input of NOR gate The flip flop circuit here only needs an initial pulse to switch the output high

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