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1 © J.G. Tront Tablet PCs & Active Learning Joseph G. Tront Bradley Department of Electrical & Computer Engineering Virginia Tech How many.

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Presentation on theme: "1 © J.G. Tront Tablet PCs & Active Learning Joseph G. Tront Bradley Department of Electrical & Computer Engineering Virginia Tech How many."— Presentation transcript:

1 1 © J.G. Tront Tablet PCs & Active Learning Joseph G. Tront Bradley Department of Electrical & Computer Engineering Virginia Tech jgtront@vt.edu How many were at Richard’s talk this morning?

2 2 © J.G. Tront Tablet Use Goals  Increase Classroom Interactivity  Enhance collaboration  Improve/increase note-taking  Increase comprehension  Improve information recall

3 3 © J.G. Tront Classroom Presenter Free-form PresentationActive note-taking Interaction

4 4 © J.G. Tront Classroom Experiments  Introduction to Computer Architecture  20 Tablet PCs loaned to students for semester  40 students in the class  Spring semester ’04 & ’05 Ink-based Active Learning exercises almost every class EE CS CpE Comp. arith., gates, logic blocks, processor, assembly language

5 5 © J.G. Tront Different Bases  Numbers in different bases ArAr Base Quantity Example: 23.45 10 = 2*10 1 +3* 10 0 +4* 10 -1 +5* 10 -2 101.11 2 = 1*2 2 +0* 2 1 +1* 2 0 +1* 2 -1 +1* 2 -2 = 5.75 10 A3.BD 16 = A*16 1 +3* 16 0 +B* 16 -1 +D* 16 -2 = 163.737… 10

6 6 © J.G. Tront Example  Convert 13F 16 to decimal 1X16 2 +3X16 1 +15X16 0

7 7 © J.G. Tront Assembly Programming

8 8 © J.G. Tront Assembly Programming

9 9 © J.G. Tront Decoders  Used to decode binary coded information  Example: 2*4 decoder 2 X 4 A1A0A1A0 Enable D0D1D2D3D0D1D2D3 E A 1 A 0 D 3 D 2 D 1 D 0 0XX0XX00000000 10010000010001 10110100100010 11011001000100 11111110001000 Now Build a 3 X 8 decoder

10 10 © J.G. Tront Decoder Expansion (cont’d) A 1 D 0 A 0 D 1 D 2 E D 3 A 1 D 0 A 0 D 1 D 2 E D 3 D0D1D2D3D0D1D2D3 D4D5D6D7D4D5D6D7 A decoder B decoder A0A1A2A0A1A2

11 11 © J.G. Tront 3X8 Decoder w/ Gates A1A1 A0A0 D4D4 D5D5 D6D6 D7D7 A1A1 A0A0 D0D0 D1D1 D2D2 D3D3 A3A3 Gate level Build in Enable capability w AND gates or 4-input ANDs

12 12 © J.G. Tront Exercise  Design an ROM that contains the multiplication table for a 2-bit by 2-bit multiplier AddressD3D2D1D0 00 0000 00 010000 00 100000 00 110000 01 000000 01 0001 01 100010 01 110011 10 010010 10 0100 10 110110 D0 D1 D2 D3 X0 X1 Y0 Y1 ROM A0 A1 A2 A3

13 13 © J.G. Tront VLSI Fabrication Tools  Lithography:  Process of transferring design patterns onto a layer of the chip  Uses MASKS create from designer  Photoresist:  Chemical that changes solubility when exposed to (UV) light  Positive photoresist: exposed areas are washed away  Negative photoresist: unexposed areas are washed away OPTICAL MASK UV LIGHT + PHOTORESIST BEFORE AFTER

14 14 © J.G. Tront Assessment  Would like to know if learning is improved Very, very difficult to prove; can be demonstrated High degree of class participation

15 15 © J.G. Tront Assessment  Common final exam over several semesters  Entry test for subsequent course (with tablet vs. without tablet) Different class composition Different instruction Chaos theory Teacher Improvement over years Different class composition Different instructor Chaos theory

16 16 © J.G. Tront Assessment  Student Journals  Student class assessment Similar assessment problem as before Different class composition Generally more positive comments w tablet class Generally positive comments 15/20 indicated they would like to purchase a tablet

17 17 © J.G. Tront CLASSROOM PRESENTER Available for download from: www.cs.washington.edu/education/presenter/ For more information, contact: jgtront@vt.edu


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