1. 11/16/2006 WSN Mote- MCU & Sensor Hardware 1 ECET 581 Wireless Sensor Networks Mote – MCU & Sensor Hardware 2 of 3 Fall 2006 http://www.etcs.ipfw.edu/~lin

2. 11/16/2006 WSN Mote- MCU & Sensor Hardware 2 WSN Mote & Sensor Hardware Timer Timer DMA – Direct Memory Access DMA – Direct Memory Access JTAG JTAG USART/USCI USART/USCI SPI – Serial Peripheral Interface SPI – Serial Peripheral Interface I2C I2C RF Transceiver RF Transceiver

3. 11/16/2006 WSN Mote- MCU & Sensor Hardware 3 Timers on the MSP430 Timer_A3 Timer_A3 16-bit timer/counter with 3 capture/compare registers16-bit timer/counter with 3 capture/compare registers PWM outputPWM output Interval timingInterval timing InterruptsInterrupts Timer_B3 Timer_B3 Watch Dog Timer Watch Dog Timer

4. 11/16/2006 WSN Mote- MCU & Sensor Hardware 4 DMA DMA – Direct Memory Access DMA – Direct Memory Access Move a block of data in memory from system RAM to/from a buffer without using the CPU Move a block of data in memory from system RAM to/from a buffer without using the CPU CPU bus access turned over to DMA controller CPU bus access turned over to DMA controller Applications Applications Network packet routingNetwork packet routing Audio playbackAudio playback Streaming videoStreaming video

5. 11/16/2006 WSN Mote- MCU & Sensor Hardware 5 DMA 3-independent channels for DMA transfer 3-independent channels for DMA transfer DMACTL0- (DMA Control Register 0) - DMAxTSELx bits: triggering & data transfer DMACTL0- (DMA Control Register 0) - DMAxTSELx bits: triggering & data transfer DMACTL1 (DMA Control Register 1) DMACTL1 (DMA Control Register 1) Handle conflicts for simultaneous triggersHandle conflicts for simultaneous triggers PrioritiesPriorities DMAxCTL - DMA Channel Control Register DMAxCTL - DMA Channel Control Register Single TransferSingle Transfer Block Transfer – entire data blockBlock Transfer – entire data block Burst-Block Transfer – allow interleave CPU and DMABurst-Block Transfer – allow interleave CPU and DMA Repeated Single TransferRepeated Single Transfer Repeated Block TransferRepeated Block Transfer Repeated Burst-Block TransferRepeated Burst-Block Transfer

6. 11/16/2006 WSN Mote- MCU & Sensor Hardware 6 MSP430 - JTAG JTAG (Joint Test Action Group) Flexible Printed Circuit Interface JTAG (Joint Test Action Group) Flexible Printed Circuit Interface IEEE 1149.1 Standard Test Access Port and Boundary-Scan Architecture - 1990 IEEE 1149.1 Standard Test Access Port and Boundary-Scan Architecture - 1990 MSP430 on-chip JTAG interface MSP430 on-chip JTAG interface 2-wire JTAG (Spy-Bi-Wire or SBW)2-wire JTAG (Spy-Bi-Wire or SBW) 4-wire JTAG (standard)4-wire JTAG (standard) TMS – In, signal to control the JTAG state machine TMS – In, signal to control the JTAG state machine TCK – In, JTAG clock input TCK – In, JTAG clock input TDI – In, JTAG data input/TCLK input TDI – In, JTAG data input/TCLK input TDO – Out, JTAG data output TDO – Out, JTAG data output JTAG In Circuit Debugger & Programmer JTAG In Circuit Debugger & Programmer TI MSP-FET430UIF connected to a USB portTI MSP-FET430UIF connected to a USB port TI MSP-FETP430 JTAG interface connected to the PC’s parallel portTI MSP-FETP430 JTAG interface connected to the PC’s parallel port

7. 11/16/2006 WSN Mote- MCU & Sensor Hardware 7 MSP430 - JTAG Programming Flash-based MSP430 using the JTAG interface Programming Flash-based MSP430 using the JTAG interface High-level Macros High-level Macros IR_SHIFT (8-bit instruction)IR_SHIFT (8-bit instruction) Shifts an 8-bit JTAG instruction into the JTAG instruction register Shifts an 8-bit JTAG instruction into the JTAG instruction register DR_SHIFT16 (16-bit data)DR_SHIFT16 (16-bit data) Shifts a 16-bit data into the JTAG data register Shifts a 16-bit data into the JTAG data register DR_SHIFT20 (20-bit address)DR_SHIFT20 (20-bit address) Shifts a 20-bit address into the JTAG memory address bus register Shifts a 20-bit address into the JTAG memory address bus register MsDelay (time) – wait a specified msMsDelay (time) – wait a specified ms SetTCLK – set TCLK to 1SetTCLK – set TCLK to 1 clrTCLK – set TCLK to 0clrTCLK – set TCLK to 0 TDOvalue – variable containing the last value shifted out on TDOTDOvalue – variable containing the last value shifted out on TDO

8. 11/16/2006 WSN Mote- MCU & Sensor Hardware 8 USART/USCI USART – Universal Synchronous/Asynchronous Receive Transmit using double-buffered transmit/receive channels USART – Universal Synchronous/Asynchronous Receive Transmit using double-buffered transmit/receive channels A clock – shared by sender and receiverA clock – shared by sender and receiver Asynchronous – full duplexAsynchronous – full duplex Synchronous – master, half duplexSynchronous – master, half duplex Synchronous – Slave, half duplexSynchronous – Slave, half duplex USART supports USART supports synchronous SPI (3 or 4 pin)synchronous SPI (3 or 4 pin) Asynchronous UARTAsynchronous UART I2C (standard mode 100kbps, fast mode 400 kbps)I2C (standard mode 100kbps, fast mode 400 kbps)

9. 11/16/2006 WSN Mote- MCU & Sensor Hardware 9 SPI – Serial Peripheral Interface Synchronous serial communication of host processor and peripherals Synchronous serial communication of host processor and peripherals SPI Interface SPI Interface Based on a 8-bit shift registerBased on a 8-bit shift register SCK (serial shift clock) provided by the master device.SCK (serial shift clock) provided by the master device. SCK a gated clockSCK a gated clock Only generated during shiftingOnly generated during shifting SCK stays idle between transferSCK stays idle between transfer 3-wire 3-wire Serial clock (SCK)Serial clock (SCK) SDI – Data InSDI – Data In SDO – Data OutSDO – Data Out

10. 11/16/2006 WSN Mote- MCU & Sensor Hardware 10 I2C Bus A serial computer bus, Inter-Integrated Circuit (I2C), invented by Philips for low-speed peripherals communications A serial computer bus, Inter-Integrated Circuit (I2C), invented by Philips for low-speed peripherals communications 2-wire bi-directional serial bus 2-wire bi-directional serial bus SCL - Clock LineSCL - Clock Line SDA – Data LineSDA – Data Line Introduced by Philips 20 years ago Introduced by Philips 20 years ago Three data transfer speeds Three data transfer speeds Standard mode - 100 kbpsStandard mode - 100 kbps Fast mode - 400 kbpsFast mode - 400 kbps High speed mode - up to 3.4 MbpsHigh speed mode - up to 3.4 Mbps Master and Slave Master and Slave

11. 11/16/2006 WSN Mote- MCU & Sensor Hardware 11 CC2420 RF Transceiver 2.4 GHz IEEE 802.15.4/ZigBee-ready RF Transceiver 2.4 GHz IEEE 802.15.4/ZigBee-ready RF Transceiver 2400-2483.5 MHz RF 2400-2483.5 MHz RF Low-power and low-voltage wireless applications Low-power and low-voltage wireless applications DSSS (Digital direct sequence spread spectrum) based modem DSSS (Digital direct sequence spread spectrum) based modem Spreading gain of 9dB Spreading gain of 9dB Effective data rate of 250 kbps Effective data rate of 250 kbps Separate transmit and receive FIFOs: 128 byte each Separate transmit and receive FIFOs: 128 byte each 4-wire SPI interface, serial clock up to 10 MHz 4-wire SPI interface, serial clock up to 10 MHz

12. 11/16/2006 WSN Mote- MCU & Sensor Hardware 12 CC2420 RF Transceiver Testing CC2420 Testing CC2420

13. 11/16/2006 WSN Mote- MCU & Sensor Hardware 13 CC2420 RF Transceiver CC2400EB CC2400EB