1. DSP + FPGA Supervisory Communications Infrastructure (more or less) 10 Aug 2001 M. Haney, University of Illinois and others to be held blameless

2. m-haney@uiuc.edu 10aug01 2 Muon DSP Farm L1Buf (basis) Muon Preprocessor Segment Preprocessor L1Buf (cooked) MTSM Detector Front End Board (DCB) Crossing Switch Pixel Preprocessor Segment Preprocessor Pixel DSP Farm PTSM Regional Control and Monitoring BTeV Run Control GL1 L2/L3 Opinions Requested/Assigned Crossing data 1 Highway GLSM L1Buf L1Buf (raw) L1Buf (basis) L1Buf (details) L1Buf (basis) Accept/Reject Decisions Resource Mgr /c/spot Others...

3. m-haney@uiuc.edu 10aug01 3 Pixel (Muon) Trigger Supervisor Monitor (P/M)TSM Control Functions: –Initialization sets the maximum bandwidth necessary –can not take all day... –Command Parsing and Distribution to subordinates, from RunControl –Error Response autonomous, “local” (regional) not to be confused with higher-level driven Error Handling, which appear as “Commands”

4. m-haney@uiuc.edu 10aug01 4 (P/M)TSM (continued) Monitor Functions –Error Message Collection and Reporting organized, formatted, sent higher up –Hardware and Software Status not unlike Error Messages... –Status and Data Histogramming utilizes remaining (P/M)TSM system bandwidth

5. m-haney@uiuc.edu 10aug01 5 EtherNet, for example ARCNet, for example Close-up: FPGA Preprocessor for example... _TSM Regional Control and Monitoring BTeV Run Control and database(s), etc. _TSM Local Control and Monitoring FPGA JTAG, programming and debug /c/spot run Local Config (Flash) Regional copy of config data, and history FPGA Standalone Operational Capability Control Influence Monitoring Awareness Fire Detect Power, Cooling Monitoring and Control

6. m-haney@uiuc.edu 10aug01 6 EtherNet, for example ARCNet, for example Close-up: DSP DSP _TSM Regional Control and Monitoring BTeV Run Control and database(s), etc. _TSM Local Control and Monitoring JTAG, programming, debug, and monitoring run(spot); run; Local Config (Flash) Regional copy of config data, and history DSP Standalone Operational Capability Control Influence Monitoring Awareness Fire Detect Power, Cooling Monitoring and Control Host Port Interface DMA in BSP out FPGA

7. m-haney@uiuc.edu 10aug01 7 Factoids ARCNet –2.5 Mbps, 255 nodes (max), 500 byte packets (max), broadcast capability, “easy” TMS320C67x DSP –~70 Kbyte internal RAM, ~1200 MIP –fixed/floating point TMS320C64x DSP –~1 Mbyte internal RAM, ~3x faster… –fixed point only

8. m-haney@uiuc.edu 10aug01 8 More Factoids Host Port Interface (TI DSP only) –almost-direct access into the DSP peek, poke uses DMA (like) resources… –(concept not unique to TI) DMA –crossing data in Buffered Serial Port(s) –opinions out; dual, ~75Mbps (C6x)

9. m-haney@uiuc.edu 10aug01 9 Even More Factoids DSP/BIOS and RTDX (TI DSP only) –DSP/BIOS real time kernel based on SPOX –RTDX uses JTAG to provide”zero” overhead monitoring and control profiling timing messaging –“It’s in there!” two less wheels to reinvent...