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1 The First Computer [Adapted from http://infopad.eecs.berkeley.edu/~icdesign/. Copyright 1996 UCB]
![1 The First Computer [Adapted from Copyright 1996 UCB]](http://images.slideplayer.com./25/8194463/slides/slide_1.jpg "1 The First Computer [Adapted from Copyright 1996 UCB]")
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2 ENIAC - the First Electronic Computer (1946) [Adapted from http://infopad.eecs.berkeley.edu/~icdesign/. Copyright 1996 UCB]
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3 Today ’ s Computers
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4 Moore ’ s Law By Gordon Moore, Intel’s co-founder # of transistors on a die doubles every 1 to 2 years From 1958 to 1994 »F (feature size) : 1/50 »D 2 (die area): x170 »PE (packing efficiency - # of transistors per minimum feature area): x100 »N = D 2 xPE/F 2 = 50E6! No sign of slowing down! “SoC” or System-on-chip
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5 Evolution in Transistor Count
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6 [Adapted from http://infopad.eecs.berkeley.edu/~icdesign/. Copyright 1996 UCB]
![6 [Adapted from Copyright 1996 UCB]](http://images.slideplayer.com./25/8194463/slides/slide_6.jpg "6 [Adapted from Copyright 1996 UCB]")
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7 Evolution in Complexity [Adapted from http://infopad.eecs.berkeley.edu/~icdesign/. Copyright 1996 UCB]
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8 Evolution in Speed & Performance [Adapted from http://infopad.eecs.berkeley.edu/~icdesign/. Copyright 1996 UCB]
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9 Sony Playstation II 128-bit CPU “Emotion Engine” 0.18 micron process 300MHz, 6.2 GFLOPS, 3.2 Gbytes/second »10 floating point multiply-accumulators and 4 floating point dividers »3x floating point performance of 500 MHz PIII Graphic synthesizer cgip 0.25 micron chip 42.7M transistors 16.8x16.8 mm^2 die 2560-bit datapath 48 Gbytes/sec memory bandwidth 75M polygons/sec, 2.4 Gpixels/sec
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10 Silicon in 2010 Die Area:2.5x2.5 cm Voltage:0.6 V Technology:0.07 m [Adapted from http://infopad.eecs.berkeley.edu/~icdesign/. Copyright 1996 UCB]
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11 The Design Problem Source: sematech97 A growing gap between design complexity and design productivity [Adapted from http://infopad.eecs.berkeley.edu/~icdesign/. Copyright 1996 UCB]
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12 Profound Impact on the way VLSI is Designed The old way: manual transistor twiddling expert “layout designers” entire chip hand-crafted okay for small chips… but cannot design billion transistor chips in this fashion The new way: using CAD tools at high level tools do the grunge work… high levels of abstractions »synthesis from a description of the behavior libraries of reusable cores, modules, and cells Chip design increasingly like object-oriented software design!
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13 Design Abstraction Levels [Adapted from http://infopad.eecs.berkeley.edu/~icdesign/. Copyright 1996 UCB]
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14 The Transistor Twiddling & Rectangle Pushing Approach
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15 Design with CAD Tools
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16 Can ’ t Ignore “ Transistor Twiddling ” Worthwhile when design is to be used over and over again module libraries parts of commodity parts (memories, processors) Performance limits to abstraction and CAD tools global effects: clock, supply interconnects deep-submicron power, debugging analog
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17 The Old and the New [Adapted from http://infopad.eecs.berkeley.edu/~icdesign/. Copyright 1996 UCB] Intel Pentium MicroprocessorIntel 4004 Microprocessor
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18 Pentium III Statistics 28.1M transistors 0.18 micron, 6-layer metal CMOS 106 mm^2 die size 3-way superscalar, 256K L2 cache, 133 MHz I/O bus
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19 Core-based Design: System on Chip SC3001 DIRAC chip (a radio receiver) from Sirius Communications
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