Presentation is loading. Please wait.

Presentation is loading. Please wait.

1 5. Application Examples 5.1. Programmable compensation for analog circuits (Optimal tuning) 5.2. Programmable delays in high-speed digital circuits (Clock.

Similar presentations


Presentation on theme: "1 5. Application Examples 5.1. Programmable compensation for analog circuits (Optimal tuning) 5.2. Programmable delays in high-speed digital circuits (Clock."— Presentation transcript:

1 1 5. Application Examples 5.1. Programmable compensation for analog circuits (Optimal tuning) 5.2. Programmable delays in high-speed digital circuits (Clock skew compensation) 5.3. Automated discovery/invention by Evolutionary Algorithms (Creative Design) 5.4. EDA Tools, analog circuit design 5.5. Adaptation to extreme temperature electronics (Survivability by EHW) 5.6. Fault-tolerance and fault-recovery 5.7. Evolvable antennas (In-field adaptation to changing environment) 5.8. Adaptive filters (Function change as result of mission change) 5.9 Evolution of controllers

2 2 Human-competitive machine intelligence Competitiveness with human-produced solutions to important real-world problems –Patentable –Publishable in peer-review paper independent of the fact it was automatically generated Ways around patented solutions (e.g. rewarding topologies that are different than patented ones) Koza et al. “Genetic Programming III: Human competitive machine intelligence”, Morgan Kaufmann, 1999 A list of 16 attributes reasonably expected to be possessed by a system for automatically creating computer programs: GP possesses them all

3 3 Creativity: evolved circuits = new patents 14 instances in which GP determines competitive solutions 9 rediscover patented solutions in analog circuit design Filters, cube root circuit, high current load circuit Some discovered modules are fundamental building blocks of electronics (Darlington pair)

4 4 Automatic synthesis of electronic circuits implementing fuzzy operators and functions The design of analog circuits for simple t-norms/co-norms, such as min, max, product and probabilistic sum) is relatively simple and benefits from existing designs of conventional circuits The design of analog complex t-norms, such as parametric t-norms, is hard – each would practically be a circuit that can be patented. In addition, one may need many of them, for each value of interest of the parameter of the t-norm, unless of course one designs a parametric circuit (which may be be an even harder task).

5 5 AND x y T(x,y) OR x y S(x,y) Find most appropriate s for the particular application: –fuzzy control, –automated reasoning, –fuzzy neural networks Choose s Evolve circuits for T and S with various values of s Frank’s parametric t-norms

6 6 Evolution of Computational circuits x y S(x,y) Evolution of Fuzzy-Neuron Circuit Target Circuit Output Uses two FPTA cells (16 transistors) compact implementation Input X Input Y Output S

7 7 Response of evolved T-norm circuits Simulated response (  ). Target characteristic shown with (+). Good approximation! Response of evolved circuit for T100Response of evolved circuit for S100 It is possible that humans may be able to design better, but: hasn’t been done before is completely automatic design Illustrates what can be obtained easily by evolution, with no prior knowledge of circuit, with no parametric optimization (W/L), no flexibility in where inputs/outputs are routed limited to 2 cells

8 8 Evolution of Analog Circuit Approximations of Complete Fuzzy Systems Evolve analog circuits that map the Fuzzy surface for a particular control application

9 9 Circuit Response against target Average error: 3.5% Worst error: 13% Evolved Circuit using SPICE model including 2 FPTA cells for the ball-juggler fuzzy controller. Evolution of approximator on FPTA

10 10 Evolution using unstructured representation Current Mode circuit; Only 7 transistors; 1.93% error to the target Max. error = 6.7%; Tested for different temperatures, SPICE models and power supply voltages.

11 11 Step 1: Evolution of a circuit topology through the GA; Step 2: Optimization of the transistor sizes for the best topology attained in the first step. Initialization with the best topology and random parameters. Second Step (40 generations) First Step (200 generations) 1.2/4.8 3.6/1.2 1.2/2.4 8.4/2.4 6.0/4.89.6/9.6 4.8/4.8 4.8/3.6 7.2/1.28.4/7.2 1.2/7.2 6.0/2.4 4.8/3.6 4.8/6.0 8.4/3.6 Evolved multiplier (T1), W/L in um Integral square error, 8 -> 3 Further improvements: following the topological search with parameter optimization

12 12 Designing for silicon implementations -Evolving analog circuits focused primarily on proof of concept - Industrial design requires further constraints and verification, is based on using design corners, and requirements beyond satisfaction of functional requirements (temperature behavior, power, robustness to process variations, etc.)

13 13 Concerns in evolutionary circuit design Computationally intensive (E.g. if you evaluate 640,000 individ. for ~1000 gen. –even on a 64 Pentiums it takes 10s of hours, expected ~3 min in 2010 on desktop for experiments in Koza’s book SPICE scales badly (time increases nonlinearly with as a function of nodes in netlist - in ~ subquadratic to quadratic way) Unfortunately no existing hardware resources allow porting the technique to evolution directly in HW (programmable device) Not sure the evolved circuits will work in silicon if made in an ASIC


Download ppt "1 5. Application Examples 5.1. Programmable compensation for analog circuits (Optimal tuning) 5.2. Programmable delays in high-speed digital circuits (Clock."

Similar presentations


Ads by Google