1. 1 CSE370, Lecture 5 Lecture 5 u Logistics n HW1 due today n HW2 available today, due Wed 1/21 n Office Hours this week: íMe: Friday 10:00-11:00 CSE 668 íTA (Josh): Friday 3:30 CSE 002/3 u Last lecture n Logic gates and truth tables n Implementing logic functions n Canonical forms u Today’s lecture n Converting to use NAND and NOR n Minimizing functions using Boolean cubes

2. 2 CSE370, Lecture 5 The “WHY” slide u Converting to use NAND and NOR n NAND and NOR are more efficient gates than AND or OR (and therefore more common). Your computer is built almost exclusively on NAND and NOR gates. It is good to knowhow to convert any logic circuits to a NAND/NOR circuit. u Pushing bubbles n It is always good to remember logical/theoretical concepts visually. This is one way to remember the NAND/NOR conversion and De Morgan’s laws easily. u Logic Simplification n If you are building a computer or a cool gadget, you want to optimize on size and efficiency. Having extra unnecessary operations/gates is not great. We teach nice techniques to allow logic simplifications.

3. 3 CSE370, Lecture 5 NAND/NOR more common/efficient u CMOS logic gates are more common and efficient in the inverted forms n NAND, NOR, NOT n Even though Canonical forms discussed so far used AND/OR, NAND/NOR preferred for real hardware implementation XYZ001011101110XYZ001011101110 X Y Z X Y Z

4. 4 CSE370, Lecture 5 CMOS NAND and NOR Gates NAND NOR

5. 5 CSE370, Lecture 5 (X + Y)' = X' Y' NOR is equivalent to AND with inputs complemented (X Y)' = X' + Y' NAND is equivalent to OR with inputs complemented XYX'Y'(X + Y)' X' Y' 0011 1 1 0110 0 0 1001 0 0 1100 0 0 XYX'Y'(X Y)' X' + Y' 0011 1 1 0110 1 1 1001 1 1 1100 0 0 NAND and NOR (truth table)

6. 6 CSE370, Lecture 5 NAND and NOR (logic gates) u de Morgan's n Standard form: A'B' = (A + B)' A' + B' = (AB)' n Inverted: A + B = (A'B')'(AB) = (A' + B')' n AND with complemented inputs  NOR n OR with complemented inputs  NAND n OR  NAND with complemented inputs n AND  NOR with complemented inputs NAND OR AND NOR pushing the bubble NAND OR AND NOR

7. 7 CSE370, Lecture 5 Converting to use NAND/NOR u Introduce inversions ("bubbles") n Introduce bubbles in pairs íConserve inversions íDo not alter logic function u Example n AND/OR to NAND/NAND A B C D Z A B C D Z NAND Z = AB + CD = (A'+B')'+(C'+D')' = [(A'+B')(C'+D')]' = [(AB)'(CD)']'

8. 8 CSE370, Lecture 5 Converting to use NAND/NOR (con’t) u Example: AND/OR network to NOR/NOR Z = AB+CD = (A'+B')'+(C'+D')’ = [(A'+B')'+(C'+D')’]’’ = {[(A'+B')'+(C'+D')']'}' A B C D Z A’ B’ C’ D’ Z NOR

9. 9 CSE370, Lecture 5 Converting to use NAND/NOR (con’t) u Example: AND/OR network to NOR/NOR Z = AB+CD = (A'+B')'+(C'+D')’ = [(A'+B')'+(C'+D')’]’’ = {[(A'+B')'+(C'+D')']'}' A B C D Z A B C D Z NOR

10. 10 CSE370, Lecture 5 Converting to use NAND/NOR (con’t) u Example: OR/AND to NAND/NAND A B C D Z Z A’ B’ C’ D’ NAND

11. 11 CSE370, Lecture 5 Converting to use NAND/NOR (con’t) u Example: OR/AND to NAND/NAND A B C D Z Z A B C D NAND

12. 12 CSE370, Lecture 5 Converting to use NAND/NOR(con’t) u Example: OR/AND to NOR/NOR A B C D Z Z A B C D NOR

13. 13 CSE370, Lecture 5 Example of bubble pushing: before pushing

14. 14 CSE370, Lecture 5 Example of bubble pushing: NAND/NAND ‘

15. 15 CSE370, Lecture 5 Example of bubble pushing: NOR/NOR ‘

16. 16 CSE370, Lecture 5 Goal: Minimize two-level logic expression u Algebraic simplification n not an systematic procedure n hard to know when we reached the minimum u Just program it!! Computer-aided design tools n require very long computation times (NP hard) n heuristic methods employed – "educated guesses” u Visualization methods are useful n our brain is good at figuring simple things out n many real-world problems are solvable by hand

17. 17 CSE370, Lecture 5 Key tool: The Uniting Theorem u The uniting theorem  A(B’+B) = A u The approach: n Find some variables don’t change (the A’s above) and others do (the B’s above) n Eliminate the changing variables (the B’s) ABF001011100110ABF001011100110 A has the same value in both “on-set” rows  keep A B has a different value in the two rows  eliminate B F = A'B'+A'B = A'(B+B') = A'

18. 18 CSE370, Lecture 5 Boolean cubes u Visualization tool for the uniting theorem n n input variables = n-dimensional "cube" 1-cube 2-cube 3-cube 4-cube X X Y X Y Z W X Y Z 01 11 00 01 10 000 111 0000 1111 1000 0111 101 100 011 0100 0010 0011 1100 1011

19. 19 CSE370, Lecture 5 Mapping truth tables onto Boolean cubes u ON set = solid nodes u OFF set = empty nodes A B 00 01 F 11 10 Look for on-set adjacent to each other Sub-cube (a line) comprises two nodes A varies within the sub-cube; B does not This sub-cube represents B' ABF001010101110ABF001010101110

20. 20 CSE370, Lecture 5 Example using Boolean cube u Binary full-adder carry-out logic n On-set is covered by the OR of three 1-subcubes ABCin Cout 00 00 10 01 00 01 11 10 00 10 11 11 01 11 111 A B C in 000 101 Cout = BCin+AB+ACin (A'+A)BCin AB(Cin'+Cin) A(B+B')Cin

21. 21 CSE370, Lecture 5 Another example using Boolean cube Changed one bit from the previous function n On-set is covered by the OR of one 2-D subcubes and one 3-D subcubes ABCin D 00 00 10 01 00 01 11 10 00 10 11 11 01 11 111 A B C in 000 101 D = BCin+A (A'+A)BCin A(B+B')(Cin+Cin‘) 1

22. 22 CSE370, Lecture 5 M-dimensional cubes in n-dimensional space u In a 3-cube (three variables): n A 0-cube (a single node) yields a term in 3 literals n A 1-cube (a line of two nodes) yields a term in 2 literals n A 2-cube (a plane of four nodes) yields a term in 1 literal n A 3-cube (a cube of eight nodes) yields a constant term "1" F(A,B,C) =  m(4,5,6,7) On-set forms a square (a 2-D cube) A is asserted (true) and unchanging B and C vary This sub-cube represents the literal A A B C 000 111 101 100 011 010 110