1. ECE 456 Computer Architecture
Fall'09
ECE 456 Computer Architecture
Lecture #11 – CPU (I)
Instructor: Honggang Wang
Fall 2013
Look up the supervisor mode in OS, the process control block written on paper notes
Remind students to bring all related materials for midterm, since it is open-book and open notes.
Bring one copy for back-up

2. Administrative Issues
Fall'09
Administrative Issues
Homework #2
Due Today, November 13
Dr. Wang

3. A Computer System (Agenda)
Fall'09
A Computer System (Agenda)
Computer history (L#1)
Computer architecture = von Neumann architecture + interrupts (L#2)
Central
Processing
Unit
L#11 ~
Interconnection Bus
Memory
Input
/Output
L#9, 10
L#3
L#4 ~ 8
Parallel organizations: SMP, Clusters, NUMA, Vector/Array Processors
If time allows
Dr. Wang

4. Topics CPU organization (Ch. 12.1) Register organization (Ch. 12.2)
Fall'09
Topics
CPU organization (Ch. 12.1)
Register organization (Ch. 12.2)
The arithmetic and logic unit (ALU, Ch 9)
Dr. Wang

5. CPU Organization CPU must: Fetch instructions Interpret instructions
Fall'09
CPU Organization
Internal Memory of CPU
CPU must:
Fetch instructions
Interpret instructions
Fetch data
Process data
Write data
Dr. Wang 22

6. CPU Internal Structure
Fall'09
CPU Internal Structure
and the ALU.
Dr. Wang

7. Memory Hierarchy Registers CPU RAID Temporary storage inside the CPU
Fall'09
Register Organization
Memory Hierarchy
CPU C A H E
MAIN
MEMORY
VIRTUAL
MEMORY
I/O
STORAGE
DEVICES
REGISTERS
RAID
Internal
Memory
OS level
Not real
External
Memory
Registers
Temporary storage inside the CPU
Number and function vary between processor designs
Top level of memory hierarchy
Dr. Wang

8. Registers User-visible registers Control and status registers
Fall'09
Registers
User-visible registers
visible to machine/assembly language programmer
optimizing use can minimize main memory references
Control and status registers
used by control unit to control operation of the CPU
used by OS to control the execution of programs
Dr. Wang

9. User-Visible Registers
Fall'09
User-Visible Registers
May be true general purpose (GPR)
May be restricted for stack or floating-point
May be used for data or addressing
Data registers
used only to hold data
example: accumulator (AC)
Address registers
devote to the calculation of addresses
example: segment registers, stack pointer
Dr. Wang 25

10. User-Visible Registers (Cont’d)
Fall'09
User-Visible Registers (Cont’d)
May be used for condition codes (flags)
individual bit set by CPU
indicates the result of an operation (zero, positive,…)
Can be read (implicitly) by programs
e.g. jump if zero
Can not (usually) be set/altered by programmers
Condition code bits are collected into condition code registers
A final category of user-visible registers is used to hold condition codes, also referred to as flags. Usually, a condition code register holds a set of individual bits. Those bits are set by CPU hardware as the result of operations: for example, an arithmetic operation may produce a positive, negative zero or overflow result. In addition to the result itself being stored in a register or memory, a flag or condition code is also set. The code may subsequently be tested as part of a conditional branch operation. Condition code bits are collected into 1 or more registers. Usually they form part of a control register. Generally machine instructions allow these bits to be read by implicit reference, but the programmer cannot alter them.
Dr. Wang 29

11. Fall'09
Design Issues (1)
Whether to use completely general-purpose registers or to specialize their use
make them general purpose
increase flexibility and programmer options
increase instruction size & complexity
make them specialized
smaller (faster) instructions
less flexibility
Dr. Wang 26

12. Design Issues (2) How many registers? Fewer = more memory references
Fall'09
Design Issues (2)
How many registers?
Fewer = more memory references
More does not noticeably reduce memory references and takes up processor real estate
Optimum: between
Dr. Wang 27

13. Design Issues (3) How big? Large enough to hold full addresses
Fall'09
Design Issues (3)
How big?
Large enough to hold full addresses
Large enough to hold full words
Often possible to combine two data registers
double length integer
Dr. Wang 27

14. Control & Status Registers (1)
Fall'09
Control & Status Registers (1)
Program counter (PC)
contains the address of the next instruction to be fetched
Instruction register (IR)
contains the instruction being executed
Memory buffer register (MBR)
contains a word to be stored in memory or receives a word from memory
Memory address register (MAR)
specifies the memory address for the word to be written from MBR or read into MBR
Dr. Wang 30

15. Control & Status Registers (2)
Fall'09
Control & Status Registers (2)
Program status word (PSW)
sign, zero, carry, equal, overflow, interrupt enable/disable, supervisor
May have other registers pointing to:
interrupt vectors used with vectored interrupt
page table used with virtual memory
Dr. Wang 33

16. Example Register Organizations (1)
Fall'09
Example Register Organizations (1)
18 32-bit registers
8 data registers: allowing 8/16/32-bit data operations
9 address registers
Program counter
A 16-bit status register
Dr. Wang

17. Example Register Organizations (2)
Fall'09
Example Register Organizations (2)
16-bit registers
4 data registers: allowing 8/16-bit data operations
4 pointer registers
4 segment registers
An instruction pointer
1 flag register
Dr. Wang

18. Agenda CPU organization Register organization
Fall'09
Agenda
CPU organization
Register organization
User-visible registers
Control & status registers
Examples
The arithmetic and logic unit (ALU, Ch. 9)
Ok, so far we have finished the discussion about the general organization of CPU and the registers inside the CPU. In the following time, we will have a brief overview about another important component of CPU, the arithmetic and logic unit, ALU.
Dr. Wang

19. Arithmetic & Logic Unit (ALU)
Fall'09
Arithmetic & Logic Unit (ALU)
Performs arithmetic and logic operations on data
Integer
Floating point (real)
Everything else in the computer is there to service this unit
Dr. Wang

20. ALU Topics Integer representation (Ch 9.2)
Fall'09
ALU Topics
Integer representation (Ch 9.2)
Floating-point representation (Ch 9.4)
Study yourself
Computer arithmetic: negation, addition, subtraction, multiplication, division
Integer arithmetic (Ch 9.3)
Floating-point arithmetic (Ch 9.5)
Dr. Wang

21. ALU - Integer Representation
Fall'09
ALU - Integer Representation
Examples:
10012 = = =
Computers:
No minus signs or period (radix points)
Only have 0 & 1 to represent everything
Treat the MSB as a sign bit
0: positive, 1: negative
Dr. Wang

22. Integer Representation
Fall'09
Integer Representation
Sign-magnitude representations
Twos complement representations
Dr. Wang

23. Sign-Magnitude Representation (I)
Fall'09
Sign-Magnitude Representation (I)
For an n-bit data word:
the MSB is the sign bit
the rightmost n-1 bits hold the magnitude of the integer
e.g =
-18 =
range:
Dr. Wang

24. Sign-Magnitude Representation (II)
Fall'09
Sign-Magnitude Representation (II)
Drawbacks
need to consider both sign and magnitude in arithmetic
two representations of zero (+0 and -0)
Dr. Wang

25. Integer Representation
Fall'09
Integer Representation
Sign-magnitude representations
Twos complement representations
Dr. Wang

26. Two’s Compliment Representation (1)
Fall'09
Two’s Compliment Representation (1)
Positive numbers: same as for sign-magnitude
+3 =
+2 =
+1 =
Single ZERO:
+0 =
Dr. Wang

27. Two’s Compliment Representation (2)
Fall'09
Two’s Compliment Representation (2)
Negative numbers: take Boolean complement of each bit of corresponding positive number, then add 1 to the resulting bit pattern viewed as an unsigned integer
Finding the two’s complement representation of a negative number
Step 1: form the binary representation of the corresponding positive number
Step 2: form complement: (reverse 1s to 0s and 0s to 1s)
Step 3: add 1
Dr. Wang

28. Example So for –1: 1: 00000001 Complement: 11111110 Add 1: +1
Fall'09
Example
So for –1: 1:
Complement:
Add 1:
Result:
Dr. Wang

29. Two’s Compliment Representation (3)
Fall'09
Two’s Compliment Representation (3)
Minimum negative number:
= -27
Range:
Benefits: one representation of zero; arithmetic works easily
Dr. Wang

30. Examples: 2’s Complement Addition
Fall'09
Examples: 2’s Complement Addition 9:
+10:
------ 19
-10:
-1:
Note: In binary addition = 1, = 0 with a carry over of 1
Dr. Wang

31. Conversion Between Different Bit Lengths
Fall'09
Conversion Between Different Bit Lengths
Sign-magnitude representation:
move the sign bit to the new MSB position & fill in with 0s
example: 4-bit  8-bit
+3: 0011 
-3: 1011 
Dr. Wang

32. Conversion Between Different Bit Lengths
Fall'09
Conversion Between Different Bit Lengths
2’s complement representation:
move the sign bit to the new MSB position & fill in with sign bits
example: 4-bit  8-bit
+3: 0011 
-3: 1101 
Dr. Wang

33. ALU Topics Integer representation (Ch 9.2)
Fall'09
ALU Topics
Integer representation (Ch 9.2)
Floating-point representation (Ch 9.4)
Study yourself
Computer arithmetic: negation, addition, subtraction, multiplication, division
Integer arithmetic (Ch 9.3)
Floating-point arithmetic (Ch 9.5)
Dr. Wang

34. Real Numbers Numbers with fractions Where is the binary point?
Fall'09
Real Numbers
Numbers with fractions
= =
Where is the binary point?
Fixed-point
using integer representation
very limited for very large numbers & very small fractions
Floating-point
using scientific notation for binary numbers
allowing very large & very small numbers to be represented with only a few digits
Dr. Wang

35. Floating Point Representation
Fall'09
Floating Point Representation
+/- significand x 2exponent
+/- (S): sign bit of significand (0/1)
Exponent (k-bit)
indicates binary point position
uses biased representation: the true exponent value is obtained by subtracting a bias (a fixed value: 2k-1 –1) from the biased exponent
Base 2 is implicit
Normalization: /-1.bbbb…b x 2exponent
MSB of significand is non-ZERO (1)
Radix point is to the right of MSB of significand
Both are implicit
Dr. Wang

36. Floating Point (FP) Examples
Fall'09
Floating Point (FP) Examples
implicit
+ a bias of (27-1=127)
Dr. Wang

37. Fall'09
Hands-On Problems
Consider a floating-point format with 8 bits for the biased exponent and 23 bits for the significand and 1 bit for the sign. Show the binary bit pattern for the following numbers in this format.
a) – 7
b) 0.25
Express the number in binary form
Normalize the number
Find the biased exponent
Sign bit of the significand
See Appendix B for the conversion between Binary and decimal for both integers and fractions.
Dr. Wang

38. FP Ranges For a 32 bit number 8 bit exponent Negative numbers:
Fall'09
FP Ranges
For a 32 bit number
8 bit exponent
Negative numbers:
Positive numbers:
Much larger than the range using 2s complement fixed-point representation
Dr. Wang

39. IEEE Standard 754 Standard for floating point storage
Fall'09
IEEE Standard 754
Standard for floating point storage
32-bit single format with 8-bit exponent
64 bit double format with 11-bit exponent
Extended formats (both mantissa and exponent) for intermediate results
Dr. Wang

40. Fall'09
Review Questions
Explain how to determine if a number is negative in the following representations
Sign-magnitude
2s complement
Biased
How can you form the negation of an integer in 2s complement representation?
What are the four essential elements of a number in floating-point notation?
What would be the bias value for a base-2 exponent in a 6-bit field?
Dr. Wang

41. Fall'09
Solution
Explain how to determine if a number is negative in the following representations
Sign-magnitude
2s complement
Biased
In a) and b) the left-most bit is a sign bit, if the sign bit is 1, the number is negative.
In c), a number is negative if the value of the representation is less than the bias (2k-1-1)
Dr. Wang

42. Fall'09
Solution
How can you form the negation of an integer in 2s complement representation?
Take the Boolean complement of each bit of corresponding positive number, then add 1 to the resulting bit pattern viewed as an unsigned integer
Dr. Wang

43. Fall'09
Solution
What are the four essential elements of a number in floating-point notation?
Sign, significand, exponent, base
+/- significand x 2exponent
Dr. Wang

44. Fall'09
Solution
What would be the bias value for a base-2 exponent in a 6-bit field?
2k-1-1=31, where k=6
Dr. Wang

45. Summary of Lecture #11 CPU organization Register organization
Fall'09
Summary of Lecture #11
CPU organization
Register organization
User-visible registers
Control & status registers
Examples: MC68000, Intel 8086,
The arithmetic and logic unit (ALU)
Integer representation: sign-magnitude & 2s complement
Floating point representation: normalization, biased-exponent representation, IEEE 754
Dr. Wang

46. Things To Do Continue to work on the project
Fall'09
Things To Do
Continue to work on the project
Read Ch 12.2, 12.5, 12.6 about register organization and examples
Read Ch 9.3, 9.5 about computer arithmetic
Check out the class website about
lecture notes
reading assignments
Dr. Wang

47. Fall'09
Solution
Express the number EBA.C16 in IEEE Standard 754 format for 32-bit floating-point numbers
IEEE 754: 8 bits for the biased exponent and 23 bits for the significand and 1 bit for the sign.
Dr. Wang

48. Fall'09
Solution to EBA.C16
1. Express the number in binary form: EBA.C16 =
2. Normalize the number into the form: +/- 1.bbbbbbbbbbb x 2exponent
x 21011
Once in a normalized form, every number has a 1 before the binary point. The MSB of the significand, the base 2, the binary point are all implicit and are not needed to store. So, in the significand field we will store (23 bits)
3.For the 8-bit biased exponent field, a bias of 127 is used. Add this bias to the actual exponent and store the answer into exponent field:
4.sign bit = 0
5. Result:
Dr. Wang

49. Examples: 2’s Complement Addition
Fall'09
Examples: 2’s Complement Addition 9:
+10:
------
-10:
-1:
Note: In binary addition = 1, = 0 with a carry over of 1
Dr. Wang

50. Solution to Hands-on Problems
Fall'09
Solution to Hands-on Problems
1. Express the number in binary form: -7 = -111
2. Normalize the number into the form: +/- 1.bbbbbbbbbbb x 2exponent
-1.11 x 210
Once in a normalized form, every number has a 1 before the binary point. The MSB of the significand, the base 2, the binary point are all implicit and are not needed to store. So, in the significand field we will store (23 bits)
3.For the 8-bit biased exponent field, a bias of 127 is used. Add this bias to the actual exponent and store the answer into exponent field:
4.sign bit = 1
5. Result:
Dr. Wang

51. Solution to Hands-on Problems
Fall'09
Solution to Hands-on Problems
1. Express the number in binary form: 0.25 =
2. Normalize the number into the form: +/- 1.bbbbbbbbbbb x 2exponent
1.000 x 2-10
In the significand field we will store (23 bits)
3.For the 8-bit biased exponent field, a bias of 127 is used. Add this bias to the actual exponent and store the answer into exponent field:
4.sign bit = 0
5. Result:
Dr. Wang

52. Example Register Organizations (3)
Fall'09
Example Register Organizations (3)
Dr. Wang