1. Chapter 4 Computer Design Basics

2. Chapter Overview Part 1 – Datapaths  Introduction  Datapath Example  Arithmetic Logic Unit (ALU)  Shifter  Datapath Representation  Control Word Part 2 – A Simple Computer  Instruction Set Architecture (ISA)  Single-Cycle Hardwired Control Instruction Decoder Sample Instructions Single Cycle Computer Issues  Multiple Cycle Hardwired Control Sequential Control Design EKT221 will focus on Part 1 Part 2 will be covered in Computer Architecture & Microprocessor. However prior reading is encourage.

3. Part 1 : Datapath  Computer Specification  Instruction Set Architecture (ISA) The specification of a computer's appearance to a programmer at its lowest level. It describe all the available instruction set in the computer, where it is kept (address) and how to use it (read).  Computer Architecture A high-level description of the hardware implementing the computer derived from the ISA Consists of: Datapath and Control

4. Part 1 : Datapath  The architecture usually includes additional specifications such as speed, cost, and reliability.  Simple computer architecture comprise of:  Datapath for performing operations.  Control unit for controlling datapath operations. It provides signals controlling microoperations performed in datapath and other component such as memories.  A datapath is specified by (3 basic components): i.A set of registers; ii.The microoperations performed on the data stored in the registers; iii.The control interface

5. Datapath and Control Datapath - performs data transfer and processing operations The control unit sends: – Control signals – Control outputs The control unit receives: – External control inputs – Status signals Control Unit - determines the enabling and sequencing of the operations

6. Datapath and CU unit – 2 parts of the processor Datapath consists of digital logic that implements various microoperations. Digital logic includes buses, MUX, decoders, and processing circuits When a large number registers is included in a datapath, registers are connected through one bus or more. Datapath and Control Unit

7. A General Purpose Processor Control Word CPU

8. Computer Datapath  Implements register transfer microoperations and serves as a framework for the design of detailed processing logic. Control Word  Provides a tie between the datapath and the control unit. ….A General Purpose Processor

9. Datapaths Guiding principles for basic datapaths (Typical): The set of registers  Collection of individual registers  A set of registers with common access resources called a register file  A combination (individual & set of reg.) of the above Microoperation implementation  One or more shared resources for implementing microoperations  Buses - shared transfer paths  Arithmetic-Logic Unit (ALU) - shared resource for implementing arithmetic and logic microoperations  Shifter - shared resource for implementing shift microoperations

10. Datapath The combination of: A set of registers with a shared ALU, and interconnecting paths.

11. Datapath (Term in Computer Engineering)  A collection of functional units, such as ALUs or multipliers, that perform data processing operations. It is a central part of many CPUs along with the control unit, which largely regulates interaction between the datapath and the data itself, usually stored in registers or main memory.functional units multipliers

12. Block Diagram of a Generic Datapath Four parallel-load registers Two mux-based register selectors Register destination decoder Mux B for external constant input Buses A and B with external address and data outputs ALU and Shifter with Mux F for output select (Function Unit) Mux D for external data input Logic for generating status bits V, C, N, Z

13. Block Diagram of a Generic Datapath Example: R1  R2 + R3 A SelectPlace contents of R2 into Bus A 10 B SelectPlace contents of R3 into the input of MUX B 11 MB SelectPlace the 0 input of MUX B into Bus B 0 G SelectProvide the arithmetic operation A + B ???? (4bits) MF SelectPlace the ALU o/p on MUX F o/p 0 MD SelectPlace the MUX F o/p onto Bus D 0 Destination Select To select R1 as the destination of the data on Bus D 01 Load enable To enable a registerR1 = HIGH Note : G Select must refer to Function Table of Arithmetic Circuit (refer next 3 slides)

14. Arithmetic Logic Unit (ALU)

15. ALU Comprise of:  An arithmetic circuit (add, subtract)  A logic circuit (bitwise operation)  A selector to pick between the two circuits (determine operation to be performed) 1 2 3

16. Arithmetic Logic Unit (ALU) ALU Comprise of:  An arithmetic circuit An n-bit parallel adder A block of input logic with 2 selectors S 1 and S 0 G Select (4-bits) * Mode Select (S 2 ) distinguishes between arithmetic and logic operations which actually construct item 1 3

17. ALU  Is a combinational circuit that performs a set of basic microoperations on:  Arithmetic, and  Logic  Has a number of selection lines used to determine the operations to be performed e.g.  n selection lines can specify up to 2 n types of operations.

18. An n-bit ALU n data inputs of A are combined with n data inputs of B, to generate the result of an operation at the G outputs. S 2 =0  Arithmetic operations (8). Which one – is specified by S 1, S 0 and C in. S 2 =1  Logic operations (4). Which one – specified by S 0 and C in.

19. Question: 1. What are the 8 arithmetic operations? 2. What are the 4 logic operations? Table 10-1 Figure 10-6

20. How to design the ALU? 1. Design the arithmetic section 2. Design the logic section 3. Combine both sections

21. To be designed… One Stage of ALU S 2 = 0 for Arithmetic = 1 for Logic

22. Arithmetic Circuit Design Given …

23. Arithmetic Circuit Design Note : X = A Analyse the Circuit: Use G = A + Y + C in Eg. We can verify for n = 4 bit: A = 1010 B = 0101 For S 1 and S 0 = 00, then G = A + 0 + 0 G = A 1

24. Building the B input Logic Input = S 1, S 0 and B Output = Y Obtain the K-Map Get the Boolean Expression Y = BS 0 + BS 1

25. Building the B input Logic Y = BS 0 + BS 1 Y Example of a 4-bit Arithmetic Circuit Any other alternative?

26. Use Multiplexer 0 B B 1

27. Building the Logic Circuit The Logic Circuit performs bitwise operation Commonly : AND, OR, XOR and NOT One Stage of Logic Circuit Note : if 4 bit is wanted, then we have to arrange it in array 2

28. Building the Selector for choosing Arithmetic or Logic Unit 3 One Stage of ALU S 2 = 0 for Arithmetic S 2 = 1 for Logic Refer also Fig. 10.2

29. Function Table of ALU S 2 S1 S0 Cin G

30. Exercise Design a 4-bit logic unit of an ALU to do the following:

31. G SelectProvide the arithmetic operation A + B ???? (4bits) G Select (4-bits) Example: R1  R2 + R3 Therefore; S2 = 0 for Arithmetic operation S1 = 0 S0 = 1 Cin = 0 0010 Answer : 0010 MSB LSB

32. The Shifter  The Shifter Shifts the value on Bus B, placing the result on an input of MUX F  The Shifter can: oShift Right oShift Left  It is obvious that the shifter would be a bidirectional shift register with parallel load.  Alternatively, a combinational logic shifter can be constructed using multiplexers.

33. Barrel Shifter Barrel in BM = ?  “Tong Deram” Is a combinational circuit. Can shift data more than 1-bit position in a single clock cycle.  No. of bit positions to be shifted or rotated is specified by the “select” inputs. Shift here is Rotate Left.  Data is shifted left with the MSB rotated back as LSB.

34. 4 Bit Basic Shifter SOperation 00Parallel Load B (B to be passed thru the shifter unchanged) 01Shift Right 10Shift Left Serial Inputs: IR for right shift IL for left shift

35. Barrel Shifter The data can be shifted or rotated more than one bit position in a single clock cycle  By using MUX. 2 n input requires 2 n MUX.

36. 4-Bit Barrel Shifter A rotate is a shift in which the bits shifted out are inserted into the positions vacated The circuit rotates its contents left from 0 to 3 positions depending on Selector S. Note that a left rotation by three (3) positions is the same as a right rotation by one position in this 4 bit barrel shifter

37. Exercise Find the output Y for each of the following bit patterns applied to S 1, S 0, D 3, D 2, D 1 and D 0: 000101 101010 010011

38. Datapath Representation One hierarchy level Up Register File Function Unit Regs, mux, dec., enable hw ALU, shifter, mux F, zero detect

39. Datapath Representation (continued) In the register file:  Multiplexer select inputs become A address and B address  Decoder input becomes D address  Multiplexer outputs become A data and B data  Input data to the registers becomes D data  Load enable becomes write The register file now appears like a memory based on clocked flip- flops (the clock is not shown) The function unit labeling is quite straightforward except for FS

40. Definition of Function Unit Select (FS) Codes Notice that the G, H and MF Select are combined as FS. Boolean Equations:  MF = F3.F2  Gi = Fi  Hi = Fi

41. Control Word The datapath has many control inputs. The signals driving these inputs can be defined and organized into a control word. To execute a microinstruction, we apply control word values for a clock cycle.  For most microoperations, the positive edge of the clock cycle is needed to perform the register load. The datapath control word format and the field definitions are shown on the next slide.

42. The Control Word Represents the control inputs to the datapath. Determines the microoperation to be executed for each clock pulse.

43. A Datapath with Control variables Register File 8 registers, R0 to R7. Outputs to Function Unit via Bus A and Bus B. 16 control inputs (represented by control word). Mux B Selects between constant values on Constant in and register values on B data. Mux D Selects the function unit output or the data on Data in as input for the register file.

44. The Control Word Fields Fields (7): DA – D Address AA – A Address BA – B Address MB –Mux B FS – Function Select MD –Mux D RW – Register Write The connections to datapath are shown in the next slide Control Word (3-bits) (4-bits) (1-bit) Total : 16-bits Register Fields

45. How a Control Word Specifies a Microop DA (3-bits): Select 1 of 8 destination registers for the result of the microop. AA (3 bits): Select 1 of 8 source registers for the Bus A input. BA (3-bits): Selects a source register for the 0 input of the Mux B. MB (1-bit): Determines whether Bus B carries the contents of the selected source register or a constant value. FS (4-bits): Contains 1 of 15 microop codes, i.e. the operation of the Function Unit. MD (1-bit): Selects the function unit output or the data on Data in as the input to Bus D. RW (1-bit): Determines whether a register is to be written or not.

46. Control Word Encoding Table 10-5

47. How RTL is coded as a Control Word R2: source register for A input of ALU R3: source register for B input of ALU Function Unit operation: F= A+B+1 R1: Destination register for results DA AA BA MB FS MD RW R1 R2 R3 Register F= A+B+1 Function Write R1  R2 + R3 + 1 001 010 011 0 0101 0 1

48. How RTL is coded as a Control Word Shifter : to shift left Contents of R6, shifted to the left, is transferred to R4 Shifter is driven by B bus  Source`register: specified in BA field. DA AA BA MB FS MD RW R4 - R3 Register F= sl B Function Write 100 XXX 110 0 1110 0 1 R4  sl R6

49. Example 1: Field :DAAABAMBFSMDRW Binary: Symbolic: Given the 16-bit Control Word as 0010100110010101 R1R2R3RegF=A+B+1FunctionWrite Answer : R1  R2 + R3 + 1 Refer to Control Word Encoding Table

50. Example 2: Field :DAAABAMBFSMDRW Binary: Symbolic: Given the 16-bit Control Word as 1000101100111001 R4R2R6RegF=sl BFunctionWrite Answer : R4  sl R6 Refer to Control Word Encoding Table

51. Example 3: Field :DAAABAMBFSMDRW Binary: Symbolic: Given the 16-bit Control Word as 0100000110011000 R2R0R3RegF = A-1Data_InNo_Write Answer : Data Out  R3 Refer to Control Word Encoding Table Address B is selected because MB = 0 (Refer to block Diagram on Slide 7)

52. Example 4: Field :DAAABAMBFSMDRW Binary: Symbolic: Given the 16-bit Control Word as 1000000110011011 R4R0R3RegF = A-1Data_InWrite Answer : R4  Data In Refer to Control Word Encoding Table Address D is selected because MD = 1 (Refer to block Diagram on Slide 7)

53. Example 5: Field :DAAABAMBFSMDRW Binary: Symbolic: Given the 16-bit Control Word as 1010000110001001 R5R0R3RegF = A+BFunctionWrite Answer : R5  R0 + R3 Refer to Control Word Encoding Table

54. Example 5 continue…… Given the 16-bit Control Word as 1010000110001001 Answer : R5  R0 + R3 Assume : Registers are 8-bit and the value given are in hex, Find: 1.The new value of register content if R0 = 5 and R3 = 3 2.The new value of register content if R0 = 7 and R3 = 1C Answers in 8-bit binary. 0000 0101 + 0000 0011 0000 1000 1. 0000 0111 + 0001 1100 0010 0011 2.

55. Microoperation Examples - Using Symbolic Notation Table 10-6

56. Microoperation Examples - Using Binary Control Words Table 10-7

57. Exercise For each of the given 16-bit control words below, determine:  The microoperation to be executed.  The new register contents. 101 100 101 0 1000 0 1 110 010 100 0 0101 0 1 101 110 000 0 1100 0 1

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