1. CGS 3763 Operating Systems Concepts Spring 2013 Dan C. Marinescu Office: HEC 304 Office hours: M-Wd 11:30 - 12:30 AM

2. Last time: Memory hierarchies. Binary image; swapping Contiguous allocation of the main memory Physical, logical, and virtual addresses Paging  Today Paging Implementation of paging Dynamic address translation Next time  Virtual memory Reading assignments  Chapters 8 and 9 of the textbook Lecture 34 – Monday, April 8, 2013 Lecture 342

3. Paging Logical address space of a process can be noncontiguous; process is allocated physical memory whenever the latter is available Divide physical memory into fixed-sized blocks called frames (size is power of 2, between 512 bytes and 8,192 bytes) Divide logical memory into blocks of same size called pages Keep track of all free frames To run a program of size n pages, need to find n free frames and load program Set up a page table to translate logical to physical addresses Internal fragmentation Each process has its own page table. Lecture 343

4. Paging logical and physical memory Lecture 344

5. Paging example 32-byte memory and 4-byte pages Lecture 345

6. Free frames Before allocation After allocation Lecture 346

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8. Dynamic Address Translation Address generated by CPU is divided into:  Page number (p) – used as an index into a page table which contains base address of each page in physical memory  Page offset (d) – combined with base address to define the physical memory address that is sent to the memory unit  A logical address consists of (m-n + n) =m bits. Thus the size of the logical address space is 2 m.  There are n bits to specify an address in a page thus the page size is 2 n page number page offset p d m - n n Lecture 348

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10. Example We assume a byte addressable memory. A virtual address is 32 bits  the maximum size of the virtual address space of a process is 2 32 = 4 GB. The page size is 4 KB  we need 12 bits to identify an address in a page (2 12 = 4 KB). The number of bits used to identify a page is 32 – 12 = 20. This means that the maximum number of pages thus the maximum size of the page table of a process is 2 20 = 1,000,000 entries. How do we translate the virtual address: 0000 0000 0000 0000 0101 0000 0000 1110 to a physical/real address assuming that page 5 is in the main memory at address 1000? Lecture 3410