1. CS 251 -- Data representation 1 Ch. 2.1 Data Representation Unsigned and Signed Integers – representation, addition, subtraction

2. CS 251 -- Data representation 2 Data representation High-level language types: unsigned int, int, char, float, double How are values represented in binary? Each type employs a data representation scheme

3. CS 251 -- Data representation 3 Byte-addressable memory Memory is a collection of bits Grouped into bytes (8-bit chunks) Organized sequentially Each byte has a unique numerical address 01230123 … Note: lower addresses at the top …

4. CS 251 -- Data representation 4 Text American Standard Code for Information Interchange (ASCII) 7-bit code for each character (See ASCII Table) How many different characters? One character per byte, msb=0 Example: ‘J’  code 1001010  byte 0x4a hexadecimal

5. CS 251 -- Data representation 5 Ascii table: Reference ASCII Table.htm

6. CS 251 -- Data representation 6 Text Unicode (http://unicode.org/) 8-bit, 16-bit, and 32-bit character codes  millions of possible characters All written languages Backward compatible with ASCII

7. CS 251 -- Data representation 7 Unsigned integers Use a fixed number of bits (32) Write the integer in binary, pad with leading 0’s if necessary Example: 32-bit representation of 25 25  11001  0000 0000 0000 0000 0000 0000 0001 1001 0x00000019

8. CS 251 -- Data representation 8 Range of unsigned integers Fixed # of bits  limited range of numbers With 8 bits, 2 8 = 256 bit patterns Number range: 0, 1, 2, …, 255 With 32 bits: 2 32 = 4,294,967,296 bit patterns Number range: 0, …, 4294967295 (2 32 -1 )

9. CS 251 -- Data representation 9 Number range: 0, …, 4294967295? How was the range calculated? How to calculate the largest unsigned integer in 32 bits? How many unsigned integers can be represented in 32 bits?

10. CS 251 -- Data representation 10 Signed integers Two’s-complement representation Use fixed number of bits (32) 4-bit example: Msb = 0  non-negative Msb = 1  negative 0 +2 +3 +4 +5 +6 +7 -8 -7 -6 -5 -4 -3 -2 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 +1

11. CS 251 -- Data representation 11 Two’s-complement representation How do I figure out the bit pattern for a non- negative number? Write the number in binary Pad with leading 0’s to the appropriate length

12. CS 251 -- Data representation 12 Two’s-complement representation How do I figure out the bit pattern for a negative number? Write the positive number in binary, pad w/ 0’s Perform the “two’s-complement” operation – Flip all the bits – Add 1 (discarding any carry out) Example: 4-bit representation of -3 +3  11  0011  1100  1101 Flip bitsAdd 1

13. CS 251 -- Data representation 13 Example 32-bit two’s-complement representation of -13: +13  1101 00000000 00000000 00000000 00001101 11111111 11111111 11111111 11110010 11111111 11111111 11111111 11110011 Check data0.a out with xspim pad flip Add 1

14. CS 251 -- Data representation 14 Cool Fact The two’s-complement operation is self- reversing Example: 11111111 11111111 11111111 11110011 00000000 00000000 00000000 00001100 00000000 00000000 00000000 00001101  +13 The two’s-complement operation negates the number flip Add 1

15. CS 251 -- Data representation 15 Two’s-complement operation visualized 3 -3

16. CS 251 -- Data representation 16 Range of Signed integers With 32 bits: 2 31 non-negatives: 0, 1,2,…, 2 31 -1 2 31 negatives: -1, -2, -3, …, -2 31 With n bits: ____ non-negatives: 0, 1,2,…, _____ ____ negatives: -1, -2, -3, …, _____

17. CS 251 -- Data representation 17 Addition Do binary addition, discarding any carry out Works for unsigned representation. Works for two’s-complement representation. The computation has two interpretations

18. CS 251 -- Data representation 18 Example (using 8 bits) Bit patterns: 10010011 +00101110 Unsigned interpretation: 147 +46 Two’s- Complement interpretation: -109 + 46

19. CS 251 -- Data representation 19 Why does addition work for both interpretations (within limits)? Unsigned: obvious Two’s-complement: consider x + -y – Start at x, move y positions counter-clockwise OR – Start at x, move z positions clockwise, where z is the bit pattern representing –y

20. CS 251 -- Data representation 20 But Overflows may occur Result of computation is out of range Depends on interpretation Example: (4 bits) 1111 +0001

21. CS 251 -- Data representation 21 Overflow for Unsigned integer Addition Unsigned overflow – result is “out of range” – Occurs if carryout of MSB is 1 BinaryCheck in decimal 111115 + 0100+4 (cout=1) 0011 3(?) (unsigned overflow occurs)

22. CS 251 -- Data representation 22 Overflow conditions for addition and subtraction for signed numbers. OperationOperand AOperand BResult indicating overflow A + B≥ 0 < 0 A + B< 0 ≥ 0 A - B≥ 0< 0 A - B< 0≥ 0

23. CS 251 -- Data representation 23 Detection of overflows in (unsigned and signed) additions and subtractions: unsignedsigned AdditionCout of MSB ==1 Subtraction

24. CS 251 -- Data representation 24 Overflow for signed integer addition? (a) (a) Previous example 1111 -1 + 0100+4 (cout=1) 0011 3(?) (Cin =1)(NO signed overflow occurs)

25. CS 251 -- Data representation 25 Overflow for signed integer addition (b) (b) New example 0110+6 +0110+6 (cout=0) 1100- 4(?) (cin = 1)(Signed overflow occurs)

26. CS 251 -- Data representation 26 Overflow for signed integer addition (c) (c) New example 1010-6 +1001 +-7 (cout=1) 0011 3? (cin = 0)(signed overflow occurs)

27. CS 251 -- Data representation 27 How do we detect overflow in signed integer addition? Whenever 2 positive values are added and result is negative Whenever 2 negative values are added and the result is positive What if one operand is positive and the other is negative in addition? Cout ≠ Cin

28. CS 251 -- Data representation 28 Detection of overflows in (unsigned and signed) additions and subtractions: unsignedsigned AdditionCout of MSB ==1 Cout of MSB  Cin of MSB Subtraction

29. CS 251 -- Data representation 29 Subtraction in computer hardware To compute x-y: Perform two’s-complement operation on y Add x and result of two’s-complement operation. Works for unsigned representation Works for two’s-complement representation Instead of moving y positions counter-clockwise, move z positions clockwise

30. CS 251 -- Data representation 30 Example (4 bits) 0101 -1001 0101 +0111 Unsigned interpretation? Two’s-complement interpretation?

31. CS 251 -- Data representation 31 How does subtraction work for unsigned integers? The same adder for unsigned addition is used for unsigned subtraction A – B == A + (-B) == A + (2^n – B) 0101 5 - 1001 -9 01015 +0111 +(-9) (cout=0) 1100 12? (unsigned overflow) Note no carryout and the result is wrong.

32. CS 251 -- Data representation 32 Overflow in unsigned integer subtraction 1001 9 - 0101 -5 1001 9 +1011 +-5 (cout=1) 0100 4 (correct answer) There is carryout and the result is correct! Carryout of MSB == 1 means no overflow in unsigned subtraction Carryout of MSB == 0 means overflow in unsigned subtraction

33. CS 251 -- Data representation 33 Overflow in signed integer subtraction No need to implement a separate subtractor A – B = A + (-B) Overflow may occur Overflow detection same as overflow addition of signed integers – Whenever 2 positive values are added and result is negative – Whenever 2 negative values are added and the result is positive Or Carryout of MSB  Carryin of MSB

34. CS 251 -- Data representation 34 Detection of overflows in (unsigned and signed) additions and subtractions: unsignedsigned AdditionCout of MSB ==1 Cout of MSB  Cin of MSB SubtractionCout of MSB ==0 Cout of MSB  Cin of MSB

35. CS 251 -- Data representation 35 Arithmetic Logic Unit (ALU) hardware 32-bit ALU a b 32 bits a ± b AddSubtract (1 bit; 0 = Add, 1 = Subtract)

36. CS 251 -- Data representation 36 1-bit adder + a b s c out c in

37. CS 251 -- Data representation 37 Multi-bit adder + + + + + s0s0 s1s1 s2s2 s3s3 s4s4 a0a0 b0b0 a1a1 b1b1 a2a2 b2b2 a3a3 b3b3 a4a4 b4b4 0

38. CS 251 -- Data representation 38 Subtraction with adder hardware Want to compute: a – b Add a and two’s-comp. of b + + + + + s0s0 s1s1 s2s2 s3s3 s4s4 a0a0 b0b0 a1a1 b1b1 a2a2 b2b2 a3a3 b3b3 a4a4 b4b4 1 Inverter Inout 01 10

39. CS 251 -- Data representation 39 1-bit ALU with addition/subtraction capabilities + b a 0101 AddSubtractCarry in Carry out a ± b 0101 Multiplexor in 0 in 1 select out Selectout 0in 0 1in 1

40. CS 251 -- Data representation 40 Appendix: More about overflow Some add/sub instructions cause overflows Other add/sub instructions do not cause overflows?

41. CS 251 -- Data representation 41 Overflow conditions for addition and subtraction for signed numbers. OperationOperand AOperand BResult indicating overflow A + B≥ 0 < 0 A + B< 0 ≥ 0 A - B≥ 0< 0 A - B< 0≥ 0

42. CS 251 -- Data representation 42 Instructions causing exceptions on overflow Add (add) Add Immediate (addi) Subtract (sub)

43. CS 251 -- Data representation 43 Unsigned integer Addition/Subtraction Unsigned integers are commonly used for memory addresses where overflows are ignored. Instructions do not cause exceptions on overflow: – Add unsigned (addu) – Add immediate unsigned (addiu) – Subtract unsigned (subu)

44. CS 251 -- Data representation 44 Overflow conditions for addition and subtraction for signed numbers. OperationOperand AOperand BResult indicating overflow A + B≥ 0 < 0 A + B< 0 ≥ 0 A - B≥ 0< 0 A - B< 0≥ 0