1. 8:30 – 9:00 Research and Educational Objectives / Spanos 9:00 – 9:50 Plasma, Diffusion / Graves, Lieberman, Cheung, Haller 9:50 – 10:10 break 10:10 – 11:00 Lithography / Spanos, Neureuther, Bokor 11:00 – 11:50 Sensors & Metrology / Aydil, Poolla, Smith, Dunn 12:00 – 1:00 lunch 1:00 – 1:50 CMP / Dornfeld, Talbot, Spanos 1:50 – 2:40 Integration and Control / Poolla, Spanos 2:40 – 4:30 Poster Session and Discussion, 411, 611, 651 Soda 3:30 – 4:30 Steering Committee Meeting in room 373 Soda 4:30 – 5:30 Feedback Session 3rd Annual SFR Workshop, November 8, 2000

2. 11/8/2000 2 Sensors & Metrology SFR Workshop November 8, 2000 E. S. Aydil, B. Dunn, K. Poolla, R. Smith and C. Spanos Berkeley, CA

3. 11/8/2000 3 Sensor Milestones 2001 September 30 th, 2001 –Build and demonstrate Langmuir probe based on-wafer ion flux probe array using external electronics. (Aydil) –Design and build a single MEMS based retarding field ion energy analyzer with external electronics. (Poolla) –Design and fabricate first generation prototype MEMS sensor array. Bench test using Joule heating. (Smith) –Demonstrate cut-and-paste approach for membrane arrays, LED arrays, and battery encapsulation. (Cheung) –Develop thermally robust inorganic electrolyte. Lid added to battery encapsulation scheme. (Dunn) –Build Microplasma generating system. Test with bulk optical components. (Poolla, Graves)

4. 11/8/2000 4 Sensor Milestones 2002 September 30 th, 2002 –Build and demonstrate 8” on-wafer ion flux probe array in industrial plasma etcher with external electronics. (Aydil) –Demonstrate MEMS based ion energy analyzer in plasma with external electronics. (Poolla) –Integrate the inorganic electrolyte into the battery structure. Develop an in-situ lithium formation process. (Dunn) –Build micro-optics for spectral analysis. Complete the preliminary designs for integrated MOES. (Poolla)

5. 11/8/2000 5 Sensor Milestones 2003 September 30 th, 2003 –Integration of Si-based IC with sensor arrays. Characterize and test integrated MEMS ion sensor array. (Aydil, Poolla) –Battery operation between room temperature and 150°C. Battery survivability to sensor soldering operation. (Dunn) –Design and test integrated MOES. Calibration studies, sensor characterization. (Poolla, Graves)

6. 11/8/2000 6 On-Wafer Ion Flux Sensors SFR Workshop November 8, 2000 Berkeley, CA Tae Won Kim, Saurabh Ullal, Baosuo Zhou, and Eray Aydil University of California Santa Barbara Chemical Engineering Department

7. 11/8/2000 7 Motivation and Goals Variation of ion bombardment flux and its spatial distribution with plasma conditions is critical to plasma etching. Ion flux uniformity at the wafer determines the uniformity of etching and etching profile evolution. There have been almost no measurements of the ion flux or ion flux distribution across the wafer as a function of both r and  in realistic etching chemistry. Design, build and demonstrate an on-wafer ion flux analyzer with external electronics capable of mapping J + (r,  ) on a wafer.

8. 11/8/2000 8 On-Wafer Ion Flux Sensors Milestones September 30 th, 2001 –Build and demonstrate Langmuir probe based on-wafer ion flux probe array using external electronics. September 30 th, 2002 –Build and demonstrate 8” on-wafer ion flux probe array in industrial plasma etcher with external electronics. September 30 th, 2003 –Integration of Si-based IC with sensor arrays. Characterize and test integrated MEMS ion sensor array. ( with Poolla)

9. 11/8/2000 9 On-Wafer Ion Flux Probe Array  10 probes on 3” wafer  Evaporated metal on PECVD SiO 2 on Si wafer. Lines insulated by PECVD SiO 2  External electronics based on National Instruments SCXI platform  The array is scanned at a rate of 1000 Samples/sec (100 Samples/probe/sec)  Lab View Interface

10. 11/8/2000 10 Ion Flux Uniformity Measurements in an ICP Reactor  Ion Flux as a function of r and  over the whole wafer is determined using Kriging extrapolation between the probes.  Ion flux uniformity was measured in an inductively coupled plasma reactor in Ar discharge to demonstrate the probe operation. Q ar = 8 sccm, P = 50 mTorr, Probe bias = -70V. 50 W100 W200 W

11. 11/8/2000 11 Plasma Instability: J + (r, ,t) t = 0 s t = 1.5 s t = 3.2 s t = 4.5 s

12. 11/8/2000 12 On-Wafer Ion Flux Measurements in a Cl 2 Discharge in Lam TCP 9400 ® Reactor Goal: extend the measurements to a commercial reactor and realistic chemistry. Heavily Doped Si wafer (Reference) Measurement Probe (Biased @ - 75V with respect to reference)  Ion Flux in Cl 2 plasma increases as a function of exposure time to Cl 2 plasma until it finally saturates.  Changes in chamber wall conditions is likely to be responsible for the drift.  SF 6 plasma clean resets the chamber back to reproducible condition.

13. 11/8/2000 13 Wall Probe  IR radiation from a spectrometer is directed onto one of the beveled edges of an internal reflection crystal (IRC). The IR beam undergoes multiple total internal reflections from the crystal’s surface and emerges from the opposite beveled edge. In this way, IR spectra of films and species that are adsorbed on to the walls and the IRC are recorded. From FTIR Spectrometer To HgCdTe Detector Chamber Wall Internal Reflection Crystal Plasma

14. 11/8/2000 14 Monitoring the Walls During Cl 2 /O 2 Etching of Si  SiO 2 film is deposited on reactor walls from the reaction of SiCl x with O even in the absence of O 2 in the feed gas: quartz window or walls can be the source of Si and O.  Sensor is sensitive to even a few Å of oxide on the walls.  Sufficiently long SF 6 /O 2 plasma removes the oxide film from the walls.

15. 11/8/2000 15 Wall Cleaning/Conditioning Step Influences the Ion Fluxes in the Subsequent Etching Steps SF 6 cleaning stepSF 6 +O 2 cleaning step  Ion flux and its variation with time depends on the wall conditioning step  If plasma reactor walls are cleaned/conditioned with SF 6 +O 2 : Ion Flux remains steady for a longer time compared to conditioning with SF 6 only.

16. 11/8/2000 16 Relation Between the Ion Flux, Gas Phase Composition and Wall Deposits  Ion Flux monitored using ion flux probe  SiCl x and Cl concentrations monitored using optical emission  Wall deposition monitored using the MTIR-FTIR probe  Oxygen plasma oxidizes the surface of the wafer and probe  Cl 2 plasma (no bias power) etches the oxide layer slowly compared to the Si.  Drift in Ion Flux is due to changing wall conditions and plasma composition. Ion FluxCl & SiCl x SiO 2 on the Walls

17. 11/8/2000 17 Summary 2002 and 2003 Goals Build and demonstrate 8” on-wafer ion flux probe array in industrial plasma etcher with external electronics by 9/30/2002. Integration of Si-based IC with sensor arrays. Characterize and test integrated MEMS ion sensor array. 9/30/2003. Designed and build an on-wafer ion flux probe array with external electronics. Demonstrated the use of the array for mapping ion flux uniformity in an Ar plasma. measuring spatiotemporal variation of the ion flux in presence of a plasma instability. Completed preliminary experiments in a commercial reactor.

18. 11/8/2000 18 Lithium Batteries for Powering Sensor Arrays SFR Workshop November 8, 2000 Bruce Dunn UCLA Student contributors: Nelson Chong, Jimmy Lim, Jeff Sakamoto

19. 11/8/2000 19 Outline Background Status at the end of August, 2000 Present Directions/Future Goals (C 4 H 5 N) n (x<0.25) Energy density (Wh/kg) Cathode material selection

20. 11/8/2000 20 Operational and Dimensional Requirements In order to provide on-board power of SMART wafers, a low profile, thermally stable, high energy density battery must be used. Temperature capability: 150°C. Vacuum (10 -2 torr). Operating voltage: > 2.5 V Discharge current: 2mA. Discharge time: > 10 minutes. Low Profile: 500  m or less. Area: Less than 3 cm x 3 cm. Rechargeable; 10 cycles.

21. 11/8/2000 21 Status as of August, 2000 Year 2 Milestone: Lithium battery encapsulated in in wafer well Voltage regulator LED Microprocessor Thermistor Battery Thickness profile

22. 11/8/2000 22 Status as of August, 2000 Key Features Batteries exhibit good energy density and cycling behavior Operation at elevated temperature and under vacuum Epoxy encapsulation system enables low profile

23. 11/8/2000 23 Status as of August, 2000 Year 2 Milestone Evaluation of battery robustness Excellent cycling characteristics at room temperature 050001000015000 2.0 2.5 3.0 3.5 4.0 4.5 Time (Sec) E (Volts) 2 mA discharge 1 mA charge

24. 11/8/2000 24 Status as of August, 2000 T = 85  C 10 -2 torr Discharge Charge Alternating discharge at 85 °C/vacuum and room temperature/atmosphere. 2 mA discharge current to 2.5 volts. 20 30 40 50 60 70 80 90 05101520253035 Temperature ( o C) Time (hrs) Poor cycling behavior after operation at 85°C/10 -2 torr Cycle

25. 11/8/2000 25 SFR Program for 2000 - 2001 Increase operating temperature to 150 o C Replace polymer electrolyte with inorganic electrolyte a) Sol-gel method b) Composite inorganic/organic electrolyte Both approaches based on confining liquid electrolyte in fine pore network SiO 2 network provides rigidity Liquid electrolyte gives Li + conductivity Li + liquid electrolyte SiO 2 network

26. 11/8/2000 26 SFR Program for 2000 - 2001 Fumed Silica R805 particles/aggregates Li + conductivity > 10 -3 S/cm Thixotropic properties Battery fabricated with new electrolyte; very good discharge characteristics achieved Current work: Increasing SiO 2 content to improve temperature resistance First results with organic/inorganic system are very promising Electrolyte 1M Li Imide 0.5 cc PC 2.5 cc PEGdm 250

27. 11/8/2000 27 SFR Program for 2000 - 2001 Improve encapsulation by incorporating a silicon lid Encapsulation with low viscosity epoxy Viscosity=400 to 500 cps at room temperature. Cure time=18 to 24 hrs at room temperature Encapsulation with 5 minute epoxy Cure time= 5 mins. Lid attached

28. 11/8/2000 28 Summary and Future Work Accomplished Milestones for August, 2000 Continued Improvements in Integrated Power Source a) Higher temperature operation/exposure Inorganic electrolyte (Sept. 2001) Integrate electrolyte into battery (Sept. 2002) b) Improve battery fabrication/packaging Wafer lid (Sept. 2001) In-situ lithium formation (Sept. 2002)

29. 11/8/2000 29 Microstructures for Temperature Uniformity Mapping during PECVD SFR Workshop November 8, 2000 Ribi Leung, Dwight Howard, Scott D. Collins and Rosemary L. Smith MicroInstruments and Systems Laboratory (MISL) UC Davis

30. 11/8/2000 30 Abstract The ever decreasing IC device geometry and increasing substrate diameters requires high degree of film thickness uniformity. PECVD rate is a function of Plasma Chemistry and Substrate (surface) Temperature. Uniformity depends on spatial control of process parameters, including plasma composition (gas flow rates and pressure), plasma energy (power), and substrate surface Temperature. Temperature uniformity is critical, since deposition rate typically follows an Arhenius dependence. The goal of this project is to design, fabricate and test T mapping stuctures for mapping surface Temperature during PECVD as an aid in process and tool development.

31. 11/8/2000 31 Milestones (1 year project) September 30 th, 2001 –To design and fabricate MEMS sensor array to record surface temperature variations. –Demonstrate in PECVD tool.

32. 11/8/2000 32 Au/Cr, Al/Au, Al/Cr function: records accumulated time at temperature as increase in R mechanism: interdiffusion and/or formation of compound Au/Cr Interdiffusion *A. Munitz, Y. Komem, “The increase in the electrical resistance of heat treated Au/Cr films”, Thin solid films, 71, 177-188 (1980). Q=1.13eV * Thin Film Temperature (T) sensor Metal thin film bilayer resistors

33. 11/8/2000 33 Metal Bilayer Resistor Pattern 500 µm R 0 = 670 Ω

34. 11/8/2000 34 Temperature (C) R/R 0 Au/Cr Al/Cr Al/Au/Cr Temperature Dependence of R RIE PECVD

35. 11/8/2000 35 Wafer T Mapping Demonstration No Substrate Cooling f RF =160 kHz SF 6, 15 sccm, 150 mTorr RF power = 200W PolySilicon Etch Technics ® Parallel Plate RIE

36. 11/8/2000 36 Temperature vs Etch Uniformity hot Temperature Map cool Photograph of Wafer Etch Incomplete, t = 25 mins

37. 11/8/2000 37 Temperature Map cool hot Photograph of Wafer Temperature vs Etch Uniformity Etch Complete, t= 31 mins

38. 11/8/2000 38 1 Temperature, C Al/Cr for PECVD 2nd Phase Formation at T ≥ 290 10 R/R 0 Al/Cr 50100150200250300350400 2 4 6 Al/Au/Cr 8

39. 11/8/2000 39 Temperature Map PECVD Si 3 N 4, 1200 Å Technics ® PECVD, Platen T= 330 C, 10 min, SiH 4 + NH 3 Al/Cr

40. 11/8/2000 40 MEMS Thermal Actuator (A) Secondary Tip Motion Primary Tip Motion d 8 R R Arc ~ 8 d d Mechanical displacement with T Deflection recorded by masking of deposition by shield. Requires T structure > T substrate. Calibration by Joule heating of legs with injected current. I I I I 800µm Shield

41. 11/8/2000 41 Polysilicon Microhinge 1 mm R d 8R d poly1 poly2 anchor Key MUMPS Chip Photo 2 Layer PolySi Process

42. 11/8/2000 42 MEMS Thermal Actuator (B) PECVD Al/polySi Bimetal Actuator TT

43. 11/8/2000 43 This year’s tasks: Fabricate and Test PolySi/Al Bilayer Resistors Measure R vs Temperature for PolySi/Al Measure PolySi/Al Composite Film Stress vs. T Design and Fabricate Thermal Actuator Demonstrate MEMS thermal actuator in PECVD

44. 11/8/2000 44 Spatially Resolved Heat Flux Sensor Array on a Silicon Wafer for Plasma Etch Processes SFR Workshop November 8, 2000 Mason Freed, Costas Spanos, Kameshwar Poolla Berkeley, CA

45. 11/8/2000 45 Motivation Plasma etch processes are highly sensitive to wafer temperature, in terms of etch rate, selectivity, and anisotropy Heat delivered to the wafer has two principle sources: ion flux bombardment, and exothermic chemical etch reactions Very difficult to measure these two quantities, spatially resolved, without wafer-mounted sensors 2001 GOAL: Design, build, test array of heat flux sensors on a silicon wafer, with external electronics.

46. 11/8/2000 46 Methods for Constructing Heat Flux Sensors Simple, “layered” heat flux gauge: Problem: for semiconductor dimensions and materials,  T is very small: Dielectric, thermal conductivity  Temperature Sensors t Incident heat flux (q  )

47. 11/8/2000 47 Possible Solution: Thermopile Use series connection of many thermocouples to “amplify” temperature difference, giving a measurable output voltage. - from Holmberg, Diller 1995

48. 11/8/2000 48 Possible Solution: Thermopile Benefits –Sensitivity increases linearly with number of thermocouples –Can use 100s or 1000s of them  1000X amplification Problems –Sensor size is proportional to number of thermocouples –Typical thermocouple materials are not part of standard CMOS process  can’t easily combine with electronics –CMOS thermocouples fabricated from n-poly / p-poly are an order of magnitude less sensitive –Assumes no conduction along thermocouple leads – may not be a good assumption

49. 11/8/2000 49 Possible Solution: Gardon gauge “Rotate” the heat flow to travel laterally instead of vertically  increase the effective dielectric thickness  depends on diameter squared! TT Heat flow within thin dielectric membrane Membrane Top View Membrane Side View Heat flow within membrane Incident heat flux (q  ) TT Heat sink D w

50. 11/8/2000 50 Discrimination of Ion Flux / Etch Exothermicity Use two heat flux sensors, one with an exposed layer of etched material (“exposed” in diagram) and the other without this material (“covered”) Place sensors into Wheatstone bridge arrangement:   etched material must be low conductivity to avoid “shorting” the thermal path across the membrane V ionflux +– V chemical +– R outer,exposed R outer,covered R inner,exposed R inner,covered R inner,covered2 R outer,covered2

51. 11/8/2000 51 Proposed heat flux sensor geometry Add antenna to “funnel” heat through the center, maximizing the temperature difference  T Heat flow within membrane Incident heat flux (q  ) TT Heat sink  now, a factor 10X higher  now the conductivity of the top etched material doesn’t affect the operation of the sensor b

52. 11/8/2000 52 2002 and 2003 Milestones Demonstrate heat flux sensor in plasma etch environment, with external electronics, by 9/30/2002. Design wireless heat flux sensor wafer and demonstrate it in plasma etch environment, by 9/30/2003.

53. 11/8/2000 53 Microplasma Optical Emission Spectrometer (MOES) on a chip SFR Workshop November 8, 2000 Michiel Krüger, David Hsu, Scott Eitapence, K. Poolla, C. Spanos, D. Graves, O. Solgaard Berkeley, CA 2001 GOAL: to build a microplasma generating system and test it with bulk optical components by 9/30/2001.

54. 11/8/2000 54 Motivation and background Motivation –Precise detection of compounds near substrate required during semiconductor manufacturing –Organic compounds, emitted during DUV, can coat optics of stepper Background –Small atmospheric pressure glow discharges can be used for species excitation. –Glow discharge optical emission spectroscopy has long history in analytical chemistry

55. 11/8/2000 55 Microplasma Optical Emission Spectrometer Basic idea: –OES from plasma reveals info about gas composition in chamber Interdisciplinary: –plasma physics and chemistry –MEMS processing –optics and metrology Inter-departmental: –chemistry –electrical engineering –mechanical engineering

56. 11/8/2000 56 MOES (cont.) Generation of plasma with hollow cathode Generation of plasma possible if: 0.05<p. D<10Torr. cm Smaller diameter (  75  m) allows plasma generation at atmospheric pressure! This results in smaller sensor Many applications in (and outside!) IC processing industry (for example in lithography) D cathode dielectric anode plasma  mm

57. 11/8/2000 57 Schematic of initial MOES experimental configuration detector array grating lens Combination of –Bulk optical optical components –Microplasma chamber, fabricated in Si substrate Light emitted from discharge is captured by lens and collimated onto grating Diffracted light from grating is focused on detector array to record spectrum

58. 11/8/2000 58 Mica dielectric (drilled hole) Silicon chip with 200  m hole and aluminum cathode Molybdenum anode First experiments: plasma in 200  m hole, 100Torr N 2 ambient vacuum chamber chip mica dielectric molybdenum

59. 11/8/2000 59  200  m  0.7  m  1  m substrate poly-Si SiO 2 50-200  m Currently fabricated in UCB Microlab Relatively simple to make XeF 2 etch to achieve required depth and undercut Very small diameters, i.e. high pressure, possible cathode anode plasma

60. 11/8/2000 60 Fabrication process and challenges Fabrication –OES cavity defined by deep reactive ion etching/XeF 2 isotropic etch –anode/cathode defined on front and backside of wafer (metal or doped Silicon) Challenges –Microplasma stability and contamination –Device sensitivity –Packaging of device –Exploration of pulsed operation to make autonomous power supply possible –Integration of micro discharges onto chips for other applications

61. 11/8/2000 61 2002 and 2003 Milestones Build micro-optics for spectral analysis. Complete the preliminary designs for integrated MOES, by 9/30/2002. Design and test integrated MOES. Calibration studies, sensor characterization, by 9/30/2003.