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Arithmetic Functions BIL- 223 Logic Circuit Design Ege University Department of Computer Engineering
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Iterative Arrays Example: n = 32 Number of inputs = ? Truth table rows = ? Equations with up to ? input variables Equations with huge number of terms Design impractical! Iterative array takes advantage of the regularity to make design feasible
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Half Adder (1-bit) ABS(um)C(arry) 0000 0110 1010 1101 Half Adder AB S C B A 01 32 1 1 S B A 01 32 1 C A B Sum Carry
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Full Adder CinABS(um)Cout 00000 00110 01010 01101 10010 10101 11001 11111 Full Adder AB S Carry Out (Cout) Carry In (Cin) 00011110 0 0101 1 1010 Cin AB 00011110 0 0010 1 0111 Cin AB
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Full Adder A B Cin Cout S H.A. Cout S Half Adder S C A B Half Adder S C A B B A Cin
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4-bit Ripple Adder using Full Adder Full Adder AB Cin Cout S S0 A0B0 Full Adder AB Cin Cout S S1 A1B1 Full Adder AB Cin Cout S S2 A2B2 Full Adder AB Cin Cout S S3 A3B3 Carry A B S C Half Adder A B Cin Cout S H.A. Full Adder
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Half Subtractor(1-bit) ABDifference (D) Borrow (B) 0000 0111 1010 1100 Half Subtractor AB DiffBorrow A B Diff Borrow
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Full Subtractor Borrow (in) ABDifference (D) Borrow (out) 00000 00111 01010 01100 10011 10101 11000 11111 Full Subtractor AB Difference BorrowOut (Bout) Borrow In (Bin)
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4-bit Ripple Subtractor using Full Subtractor AB Bin Bout D D0D0 A0B0 AB Bin Bout D D1D1 A1B1 AB Bin Bout D D2D2 A2B2 Full Subtractor AB Bin Bout D D3D3 A3B3 Borrow Full Subtractor Full Subtractor Full Subtractor
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Adder/Subtractor Design A – B = A + (-B) Take 2’s complement of B Perform addition of A and 2’s complement of B Full Adder AB Cin Cout S S0 A0 Full Adder AB Cin Cout S S1 A1 Full Adder AB Cin Cout S S2 A2 Full Adder AB Cin Cout S S3 A3 B0B1B2B3 C Subtract
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Overflow/Underflow 01001000 (+72) 00111001 (+57) +__________ (+129) 8-bit Signed number addition 10000001 (-127) 11111010 (-6) -_____________ (-133) 8-bit Signed number addition Cn-1 = 1 Cn = 0 Cn-1 = 0 Cn = 1 What is largest positive number represented by 8-bit? What is smallest negative number represented by 8-bit?
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Overflow/Underflow Detection C n-1 A n-1 B n-1 S n-1 CnCn OF 00000 00110 01010 01101 10010 10101 11001 11111 Examine the MSB bit Bottom line: P: positive; N: negative N + N = N P + P = P P+N or N+P always fall into the range E.g. -128+P cannot be smaller than -128 or bigger than 127 Problem lies in N+N = P P+P = N Discarded
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Overflow/Underflow Detection C n-1 A n-1 B n-1 S n-1 CnCn OF 000000 001100 010100 011011 100101 101010 110010 111110 Discarded
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Overflow/Underflow Detection AB Cin Cout S S0 A0B0 AB Cin Cout S S1 A1B1 AB Cin Cout S S2 A2B2 AB Cin Cout S S3 A3B3 Carry Overflow/ Underflow n-bit Adder/Subtractor Overflow/ Underflow Cn Cn-1
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Design by Contraction Contraction is a technique for simplifying the logic in a functional block to implement a different function Contraction of a ripple carry adder to incrementer for n = 3 Set B = 001
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Unsigned Integer Multiplier (2-bit) s carry carry out p0 a0b0 H.A. p1 c s a1b0 a0b1 H.A. c s p2p3 a1b1
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Unsigned Integer Multiplier (3-bit) p0 a0b0 s F.A. p1 a1b0a0b1 0 co s ci c F.A. p2 s a2b0 a1b1 co s ci c F.A. s co s ci a0b2 00 c F.A. p3 a2b1 co s ci c F.A. co s ci a1b2 0 s s s c p4 c F.A. co s ci a2b2 p5
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Multiplication by a Constant Multiplication of B(3:0) by 101 B 1 B 2 B 3 0 0 B 0 B 1 B 2 B 3 Carry output 4-bit Adder Sum B 0 C 0 C 1 C 2 C 3 C 4 C 5 C 6
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