1. Electrical and Electronics Engineering Institute College of Engineering University of the Philippines, Diliman IML Probationary Members’ Final Project – ECE Track Microelectronics and Microprocessors Laboratory

2. OverviewOverview Introduction Project Specifications Methodology

3. 3 LOW POWER Mobile Comms Field Testing Health Monitoring CurrentTrend Current Trend Introduction Project Specifications Methodology

4. 4 design & implement a CMOS op-amp topology for low-power application formulate testing methodology for device characterization generating plots for datasheet model bond wires ProjectObjectives Project Objectives Introduction Project Specifications Methodology

5. 5 250,000 V/V  gain 250 μW  power consumption rail-to-rail input/output capability LowPowerIndustry Low Power Industry Introduction Project Specifications Methodology

6. 6 Different Process! LPC661 by National Semiconductor Op-ampFeatures Op-amp Features Introduction Project Specifications Methodology

7. 7 TSM27M2C by STMicroelectronics Different Topology! Op-ampFeatures Op-amp Features Bi-CMOS Process! Introduction Project Specifications Methodology

8. 8 Design Constraints Minimum DC Gain (A v ) 15,00015,000 2.5 mW Maximum Power Consumption Introduction Project Specifications Methodology

9. 9 2-stage or Miller Design & Implementation DifferentialAmplifierDifferentialAmplifier CommonSourceAmplifierCommonSourceAmplifier BiasCircuitBiasCircuit Introduction Project Specifications Methodology

10. 10 Differential Amplifier Design & Implementation Group Transistors Derive Parameter Dependencies Introduction Project Specifications Methodology

11. 11 Differential Amplifier Design & Implementation 1 2 3 Transistor Pairs Introduction Project Specifications Methodology

12. 12 Differential Amplifier Design & Implementation Group Transistors Set Current Set Length Compute Widths Size Resistor Extract Parameters Check Constraints Met? Met? EndEnd Y Adjust Widths N Derive Parameter Dependencies Introduction Project Specifications Methodology

13. 13 Design and Implementation Differential Amplifier Introduction Project Specifications Methodology

14. 14 Design and Implementation Differential Amplifier Introduction Project Specifications Methodology

15. 15 Design and Implementation Differential Amplifier Introduction Project Specifications Methodology

16. 16 Design & Implementation Common Source Amplifier Introduction Project Specifications Methodology

17. 17 Design & Implementation Common Source Amplifier Design & Implementation Group Transistors Set Current Set Length Vary Widths Plot Gain Extract Parameters Check Constraints Met? Met? EndEnd Y Adjust Widths N Derive Parameter Dependencies Introduction Project Specifications Methodology

18. 18 Design & Implementation Common Source Amplifier Introduction Project Specifications Methodology

19. 19 Design & Implementation Common Source Amplifier Introduction Project Specifications Methodology

20. 20 Design & Implementation Common Source Amplifier Introduction Project Specifications Methodology

21. 21 Design & Implementation Common Source Amplifier Introduction Project Specifications Methodology

22. 22 Design & Implementation 2 Stage Amplifier Introduction Project Specifications Methodology

23. 23 Design & Implementation 2 Stage Amplifier Introduction Project Specifications Methodology

24. 24 Design & Implementation Internal Routing Minimized Introduction Project Specifications Methodology

25. 25 Design & Implementation Guard Rings as Close as Possible Introduction Project Specifications Methodology

26. 26 Design & Implementation Metal over Metal Minimized Introduction Project Specifications Methodology

27. 27 Design & Implementation # of contacts & vias maximized Introduction Project Specifications Methodology

28. 28 Design & Implementation Consistent Routing Direction Introduction Project Specifications Methodology

29. 29 Design & Implementation 0.60um Width for routing Metal 0.60um Introduction Project Specifications Methodology

30. 30 Design & Implementation NMOS Transistors Introduction Project Specifications Methodology

31. 31 PMOS Transistors Design & Implementation Introduction Project Specifications Methodology

32. 32 Miller or 2 Stage Op-Amp Design & Implementation Introduction Project Specifications Methodology

33. 33 Design & Implementation Vertical Parallel-plate Capacitor Introduction Project Specifications Methodology

34. 34 Compensation Capacitor 5 pF Design & Implementation Introduction Project Specifications Methodology

35. 35 2 Stage Op-Amp with Compensation Design & Implementation Introduction Project Specifications Methodology

36. 36 2 Stage Op-Amp with Probe Pads Design & Implementation Introduction Project Specifications Methodology

37. 37 Design & Implementation Miller Op-amp w/ Bond Pads vin- vddvin+ voutgnd Introduction Project Specifications Methodology

38. 38 2 Stage Op-Amp Design & Implementation Introduction Project Specifications Methodology

39. 39 ParametersParameters Gain margin 3dB bandwidth Phase margin Gain-bandwidth product Power supply rejection AC Analysis Testing Methodology Introduction Project Specifications Methodology

40. 40 Schematic for Gain (dB) Introduction Project Specifications Methodology

41. 41 Frequency Response 184.78Hz 2.16kHz 16.26kHz Introduction Project Specifications Methodology

42. 42 ParametersParameters Slew rate Settling time Transient Analysis Testing Methodology Introduction Project Specifications Methodology

43. 43 Schematic for Settling Time Introduction Project Specifications Methodology

44. 44 Settling Time Comparison Introduction Project Specifications Methodology

45. 45 BondWireModeling Bond Wire Modeling Introduction Project Specifications Methodology

46. 46 BondWireModeling Bond Wire Modeling Introduction Project Specifications Methodology

47. 47 BondWireModeling Bond Wire Modeling with bond wires without bond wires Introduction Project Specifications Methodology

48. 48 BondWireModeling Bond Wire Modeling with bond wires without bond wires Introduction Project Specifications Methodology

49. 49 ProblemsEncountered Problems Encountered Constraints not possible to achieve in length used by previous thesis (0.5um) –Length used was 1.2um

50. 50 QuestionsQuestions