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Intel Process Technology Gaps June 2003 Intel Confidential Paula Goldschmidt IE- SBD Mgr.
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Do not copy or transferIntel confidential Process Manufacturing -Technology Development Key Issues Technology scaling difficulty increasing New materials/architectures required vs. optional More complex core technologies (ie trigate transistors) Maintain 2 year process development cycle Increasing levels of process and device integration External constraints and competition increasing Declining ASP’s even though capital costs are increasing Growing competition Keep One Generation Ahead Leadership
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LITHOGRAPHY IS THE MAJOR CHALLENGE
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Do not copy or transferIntel confidential Litho Taxonomy Lensesmanufacturer EUV capability Materials forlensesManufacturing TrackManuf. Mask manuf.Mask RepairInspectioncapab.Mask writingSW Mask manuf.Mask RepairInspectioncapab.Mask writingSW Source – VLSI Research Feb 2003, First Call, Company websites New resists EUV light sources manufacturers
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Intel Focused on Silicon Technology Merging Computing and Communications
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Do not copy or transferIntel confidential Realizing The Vision Wireless Excellencein Silicon Research Logic Optical Biological Sensors Fluidics Mechanical Memory
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Do not copy or transferIntel confidential : Intel I/E-SBD Collaboration Objectives: Enable One Generation Ahead (OGA) through Collaboration: Collaborate with Academic Research For Early engagement in Process/Tech development. Time and IP advantage. Improved supplier execution. Limited financial downside risk. Price and royalty benefits of supply. Collaborate with Start-up/Spin-off companies: Demonstrate enabling technology to fill Next technologies roadmap gaps Disruptive technologies to create roadmap options Intel Capital Team Intel Investment body to enable technologies availability
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Do not copy or transferIntel confidential Silicon Technology Gaps –Extend Moore’s Law. Silicon base, varied toppings with new materials and devices –Develop more productive technology –Low power/high speed devices –Continue to introduce a new technology generation every two years
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Do not copy or transferIntel confidential I/E-SBD areas of interest Alternatives to Silicon Nanotechnology Process & Fab Technology Assembly/Test Supply, Capacity & Components Start Materials TMG Process technology collaboration taxonomy MEMS +
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Do not copy or transferIntel confidential Potential Areas of Interest In Si Technologies : 3-5 yrs to Market Transistor Performance –High K –Low K –Interconnects –Structures Litho EUV –Masks: manufacturing, cleaning, inspection Memories –New Materials –New Structures Nanotechnologies –Application Technologies/Integration into products
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Do not copy or transferIntel confidential MEMS Potential Areas of Interest Communication Devices –Performance –Reliability MEMS packaging –Hermetic packaging
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Do not copy or transferIntel confidential How to contact us Send a Abstract of relevant projects to: –for Assembly/Test & MEMS Mazal.Shrem@Intel.com Mazal.Shrem@Intel.com –for Litho/Yield/Defects & Clean room Menachem.Shoval@Intel.com Menachem.Shoval@Intel.com –for Fab & Nanotechnologies Nati.Fisher@Intel.com Nati.Fisher@Intel.com –For Investments David.Hirsch@Intel.com
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Do not copy or transferIntel confidential Thanks
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