1. “Politehnica” University of Timisoara Course No. 2: Static and Dynamic Configurable Systems (paper by Sanchez, Sipper, Haenni, Beuchat, Stauffer, Uribe) Evolvable Systems Summer Semester 2007

2. FPGAs: What Are They ??   Large and fast integrated circuits: – –Programmable: acronym from Field Programmable Gate Array – –Large: 10 5 + logic gates – –Fast: 0.5+ GHz clock technology   Can be modified or configured almost at any point by the user

3. Configurable VS Programmable   Programmable computing paradigm: – –General purpose processor – –Instruction set (limited set of operations): instructions fetched, decoded and executed – –Low cost per application – –Short delivery time   Configurable computing paradigm: – –Still a processor (logic structures) – –Still a limited set of operations (logic functions) But at a much lower level!! – –Configurations string directly used to configure the hardware – –Longer design and delivery time – –Not general purpose -> higher cost

4. Configurable VS Programmable (2)   Program -> design (algorithm) within the programmable computing paradigm   Configuration (configuration string) -> design/description of a configurable processor within the configurable computing paradigm   Configuration strings: – –Static – does not change during execution Objectives: improving performance, optimizing resource utilization – –Dynamic – can change during execution Objectives: adaptation to changing (dynamic) specifications, eliminate human design

5. Static Configurable Systems: The SPYDER Architecture   Reconfigurable processor development system – –anagram from REconfigurable Processor Development SYstem – –Static reconfiguration – –Performance improving   Reconfigurable coprocessor that self adapts to a given application in a transparent manner   Application written in a high-level language (rather than an assembly program)   Compiler generates best-adapted hardware description

6. Static Configurable Systems: The SPYDER Architecture (2)   Fixed control unit, equivalent to a microprogrammed control unit – –a sequencer – –a very large memory   Microprogram does not interpret a given assembly   It is the program to be executed   8 MHz clock speed due to technology and economics

7. Static Configurable Systems: The SPYDER Architecture (3)   Meant as a SPARC coprocessor   VME bus interface   Sequencer: Xilinx 4003   Program Units: Xilinx 4008

8. Static Configurable Systems: The SPYDER Architecture (4)   Performance: – –608x608 matrix of cells – –xlife on MicroSPARC2 (85 MHz): future state for 6.5 millions cells/second – –SPYDER (8 MHz): future state for 115 millions cells/second – –Skeletonization – –MicroSPARC2 (85 MHz): 34.7 seconds – –SPYDER (8 MHz): 1.17 seconds – –Edge detection – –SPARC Station 5 (85 MHz): 1400 ms – –SPYDER (6.25 MHz): 25 ms

9. Static Configurable Systems: The RENCO Architecture  Reconfigurable processor development system –Acronym from REconfigurable Network COmputer –Static reconfiguration –Performance improving  Standard network coupled with reconfigurable surface  User can download from the network the hardware configuration for the application to be executed

10. Static Configurable Systems: The RENCO Architecture (2)  Motorola MC68EN360 processor  Reconfigurable area – cluster of Altera FPGAs  Boot EPROM, Flash RAM, DRAM

11. Static Configurable Systems: The RENCO Architecture (3)  Two pieces of software required  Network computer: RTEMS1 (Real-Time Executive for Multiprocessor Systems), a preemptive multitasking operating system  Reconfigurable FPGA cluster: synthesizer, monitor for resources access and configuration loading, debugger, user interface, etc.  Validation through design prototyping

12. Dynamic Configurable Systems: The FireFly Machine  Reconfigurable platform –Dynamic reconfiguration –Adaptation to changing/incomplete specifications  Evolvable hardware architecture –Genetic algorithms describing a population of fireflies, implemented in hardware –Based on the cellular automata model (also seen in Game of Life) made of 56 cells  System must evolve toward a global synchronization solution

13. Dynamic Configurable Systems: The FireFly Machine (2)

14. Dynamic Configurable Systems: The FireFly Machine (3)  Initialization phase: –the (eight) rule bits loaded with random values –carried out once per evolutionary run  Execution phase: –rule bits remain unchanged –several random configurations run by the system to calculate a fitness value  Evolutionary phase: –cell's genome (represented by its rule table) may evolve via the application of genetic operators –done in a completely local manner: only the genomes of the neighboring cells may be consulted

15. Dynamic Configurable Systems: The FireFly Machine (4)  Performance gains: –Cellular programming algorithm generates 60 initial configurations/second when run on a high performance workstation –FireFly 1 MHz: 13000 configurations/second –FireFly 6 MHz: 6x13000 configurations/second  Synchronization task: not a real world application, used as a benchmark problem for the evolware demonstrator

16. Dynamic Configurable Systems: The BioWatch  Reconfigurable platform –Dynamic reconfiguration –Handle changing/incomplete specifications –Application: a digital watch capable of hierarchical self-repair  Part of the Embryonics project: –One dimensional artificial organism –4 cells, each containing full genetic program –Each cell a binary decision machine

17. Dynamic Configurable Systems: The BioWatch (2)  Performance – not speed related: –Self-repair: partial reconstruction of a faulty organism –Faulty cells may be replaced by spare cells –Based on coordinate mechanism –Self-replication: total reconstruction of an organism –Depending on availability of spare cells only

18. Conclusions  Two kinds of reconfiguration – static and dynamic  Static reconfiguration mainly aimed towards improving performance  Dynamic reconfiguration aimed at achieving new degrees of self-repair and self-replication  Adaptive systems, evolutionary systems, …