1. The structure COMPUTER ARCHITECTURE – The elementary educational computer

2. The structure - Von Neumann model - 5 units - memory unit - arithmetic and logic unit - control unit - input unit - output unit COMPUTER ARCHITECTURE – The elementary educational computer

3. Mode of operation - The instruction - “fetch” phase - “execute” phase - FETCH MAR  (PC) READ PC  (PC)+1 IR  (MBR) CONTROL BLOCK  (IR) OPCODE DECODING GO TO EXECUTE PHASE COMPUTER ARCHITECTURE – The elementary educational computer

4. Mode of operation COMPUTER ARCHITECTURE – The elementary educational computer

5. Instructions - ADD with two addresses - ADD with one address - MOVE - JUMP - STORE - LOAD - INPUT - OUTPUT COMPUTER ARCHITECTURE – The elementary educational computer

6. ADD – with two addresses Format |ADD|AD1|AD2| In symbolic notation MAR  (IR) AD1 READ AR1  (MBR) MAR  (IR) AD2 READ AR2  (MBR) ADD ACC  (AR1)+(AR2) FR  New values GO TO FETCH PHASE COMPUTER ARCHITECTURE – The elementary educational computer

7. The diagram COMPUTER ARCHITECTURE – The elementary educational computer

8. ADD – with one address Format |ADD|AD1| In symbolic notation MAR  (AD1) READ AR1  (MBR) ADD ACC  (ACC)+(AR1) FR  New values GO TO FETCH PHASE COMPUTER ARCHITECTURE – The elementary educational computer

9. The diagram COMPUTER ARCHITECTURE – The elementary educational computer

10. MOVE Format |MOVE|AD1|AD2| In symbolic notation MAR  (IR) AD1 READ MAR  (IR) AD2 READ WRITE GO TO FETCH PHASE COMPUTER ARCHITECTURE – The elementary educational computer

11. The diagram COMPUTER ARCHITECTURE – The elementary educational computer

12. JUMP Format |JZ|AD1| In symbolic notation ZF=0  GO TO FETCH PHASE ZF=1  PC  (IR) AD1 GO TO FETCH PHASE COMPUTER ARCHITECTURE – The elementary educational computer

13. The diagram COMPUTER ARCHITECTURE – The elementary educational computer

14. STORE Format |STORE|AD1| In symbolic notation MAR  (IR) AD1 MBR  (ACC) WRITE GO TO FETCH PHASE COMPUTER ARCHITECTURE – The elementary educational computer

15. The diagram COMPUTER ARCHITECTURE – The elementary educational computer

16. LOAD Format |LOAD|AD1| In symbolic notation MAR  (IR) AD1 READ ACC  (MBR) FR  New values GO TO FETCH PHASE COMPUTER ARCHITECTURE – The elementary educational computer

17. The diagram COMPUTER ARCHITECTURE – The elementary educational computer

18. INPUT / OUTPUT Format |INPUT| INPUT DEVICE ADDRESS| |OUTPUT| OUTPUT DEVICE ADDRESS| In symbolic notation INPUT DEVICE  (IR) INPUT DEVICE ADDRESS ACC  (INPUT DEVICE) GO TO FETCH ADDRESS OUTPUT DEVICE  (IR) OUTPUT DEVICE ADDRESS (OUTPUT DEVICE)  ACC GO TO FETCH ADDRESS COMPUTER ARCHITECTURE – The elementary educational computer