1. Register Placement for High- Performance Circuits M. Chiang, T. Okamoto and T. Yoshimura Waseda University, Japan DATE 2009

2. Outline Introduction Problem Formulation Weighted Conflict Graph Two-Stage Heuristic for the MIS Problem Experimental Results Conclusion

3. Introduction The clock structure for high-performance circuits consists of global and local parts. The global clock structure distributes clocks from a root to certain divided areas, and leaves of the distribution are called local clock drivers (LCD). The local clock structure distributes LCDs to registers. The topology used in the global clock is usually balanced/symmetric.

4. Introduction

5. In the previous design flow, cell placement including registers is performed before local clock design. Since clock tree synthesis is designed according to clock sinks (registers) which are given by the placement, register positions can affect the clock design greatly. While for high-performance circuit design with specified requirements, a local clock network is designed along with gate level placement.

6. Introduction

7. In [12], registers are aligned to embedded slots by linear assignment with register movement minimization. Register placement with respect to clock pins for various sizes of registers cannot be formulated optimally by linear assignment. [12] T. Okamoto, T. Kimoto and N. Maeda, “Design methodology and tools for NEC electronics’ structured ASIC ISSP,” in Proc. of ISPD, pp.90-96, 2004.

8. Introduction

9. Problem Formulation Problem 1: Given:  A global placement result of registers  Fixed-positioned clock pin points Objective:  Legalize registers with total/maximum movement as small as possible, such that each register pin is placed on the position of a clock pin and no overlaps between registers remain.

10. Problem Formulation Minimum Weighted Maximum Independent Set Formulation A weighted conflict graph G = (V, E, W) is a weighted undirected graph constructed from a given global register placement and fixed-positioned clock pins. Vertex v i,j ∈ V exists if and only if a placement of register r i on the position of clock pin p j is feasible. An edge (v i,j, v i’,j’ ) ∈ E exists if and only if i=i’, j=j’, or vertices v i,j and v i’,j’, where i≠i’ and j≠j’, result in overlapping placements.

11. Problem Formulation Weight w i,j ∈ W for v i,j is defined as the movement distance of r i from its original position to p j. Problem 2: Given a global placement result of registers and fixed- positioned clock pin points, find a minimum weighted maximum independent set V M from the weighted conflict graph. The register placement is to place register r i on clock pin p j according to each vertex v i,j ∈ V M. The weight of the independent set representing the total/maximal movement is minimized.

12. Weighted Conflict Graph Segment s i = [x 1, x 2 ] for clock pin p i is constructed by starting from p i and extending bi-direction horizontally until it meets obstacles or boundaries.

13. Weighted Conflict Graph Graph construction: The construction of weighted conflict graph G = (V, E, W) consists of vertex, edge, and weight constructions. For each clock pin p j on segment s k, calculate distance and from p j to x 1 and x 2 of s k. For pin t i in each register r i, calculate width and from t i to the left and right boundary of r i. v i,j ∈ V exists iff and, which means register r i can be placed on the position of clock pin p j.

14. Weighted Conflict Graph For every two vertices v i,j and v i’,j’, an edge (v i,j, v i’,j’ ) exists iff one of the following conditions is satisfied:  i=i’: there is only one placement for one register.  j=j’: one clock pin can only be assigned for one register.  There is an overlap between feasible placement v i,j and v i’,j’. For v i,j and v i’,j’, assume that p j and p j’ are on the same segment and p j is left to p j’, an overlap exists iff

15. Weighted Conflict Graph A weight w i,j is introduced for each vertex v i,j. The weight is defined as the movement of a register to the power of α. The movement is the distance between the register pin’s initial position and the clock pin position. Coordinate of the register pin of r i Coordinate of the clock pin p j

16. Weighted Conflict Graph

17. Graph Reduction Techniques Register flipping If there are some register pins near the right boundary while others near the left, the probability of overlaps may get higher. Flip registers horizontally to keep all registers have its pin near to the left or right boundary, to reduce overlaps.

18. Graph Reduction Techniques Use Manhattan circle to restrict the vertex construction. Manhattan circle is a 45◦-tilted square with the same Manhattan radius RM, from the center to any point on it. Don’t place the register on clock pins outside the circle during the vertex construction.

19. Two-Stage Heuristic for the MIS Problem Propose a two-stage heuristic to solve the MIS problem. First stage  Partition a design into many fixed-area subregions.  In each subregion, construct a weighted conflict graph and solve it by an iterative-based MIS heuristic. Second stage  Construct a weighted conflict graph for the whole design for registers unassigned in the first stage.  The register placement result is the union of minimum weighted MISs solved during two stages.

20. Two-Stage Heuristic for the MIS Problem

21. Solve the minimum weighted MIS problem based on an iterative method. Step 1: Construct a priority queue Q containing v i ∈ V by 3 keys: size of register r i, weight of vertex v i, degree of v i. Step 2: Extract first k vertices from Q as the vertex set of subgraph G’=(V’, E’, W’). Get sub-solution S’ by solving the MIS problem on G’. Step 3: Update graph G by deleting vertex v i ∈ S’ and vertices adjacent to v i. Q is also updated by new G. S’ is included into the solution S of graph G. Step 4: Repeat step 2 and step 3 until the graph or the queue is empty to get the final minimum weighted MIS solution S of graph G.

22. Two-Stage Heuristic for the MIS Problem

23. Experimental Results

26. Conclusion This paper studied the register placement problem which is a key component of local clock structure optimization for high-performance circuits. Efficient methods for the weighted conflict graph construction and reduction. Formulate the problem as a minimum weight maximum independent set problem.