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The Drive to Improved Performance/watt and Increasing Compute Density Steve Pawlowski Intel Senior Fellow GM, Architecture and Planning CTO, Digital Enterprise Group Intel Corporation
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2 Legal Disclaimer INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL® PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN INTEL’S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, INTEL ASSUMES NO LIABILITY WHATSOEVER, AND INTEL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO SALE AND/OR USE OF INTEL® PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. INTEL PRODUCTS ARE NOT INTENDED FOR USE IN MEDICAL, LIFE SAVING, OR LIFE SUSTAINING APPLICATIONS. Intel may make changes to specifications and product descriptions at any time, without notice. All products, dates, and figures specified are preliminary based on current expectations, and are subject to change without notice. Intel, processors, chipsets, and desktop boards may contain design defects or errors known as errata, which may cause the product to deviate from published specifications. Current characterized errata are available on request. This document may contain information on products in the design phase of development. The information here is subject to change without notice. Do not finalize a design with this information. Designers must not rely on the absence or characteristics of any features or instructions marked "reserved" or "undefined." Intel reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them. Intel Corporation may have patents or pending patent applications, trademarks, copyrights, or other intellectual property rights that relate to the presented subject matter. The furnishing of documents and other materials and information does not provide any license, express or implied, by estoppel or otherwise, to any such patents, trademarks, copyrights, or other intellectual property rights. Wireless connectivity and some features may require you to purchase additional software, services or external hardware. Nehalem, Penryn, Westmere, Sandy Bridge and other code names featured are used internally within Intel to identify products that are in development and not yet publicly announced for release. Customers, licensees and other third parties are not authorized by Intel to use code names in advertising, promotion or marketing of any product or services and any such use of Intel's internal code names is at the sole risk of the user Performance tests and ratings are measured using specific computer systems and/or components and reflect the approximate performance of Intel products as measured by those tests. Any difference in system hardware or software design or configuration may affect actual performance. Intel, Intel Inside, Pentium, Xeon, Core and the Intel logo are trademarks of Intel Corporation in the United States and other countries. *Other names and brands may be claimed as the property of others. Copyright © 2008 Intel Corporation.
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3 Green IT - #1 IT Issue Energy Costs and Cooling #1 Growth Limiters… Power and Cooling Capacity Limiting Growth Source: Liebert Data Center User Group, Spring 2008 “Intel and Google Join with Dell, EDS, EPA, HP, IBM, Lenovo, Microsoft, PG&E, World Wildlife Fund and Others to Launch Climate Savers Computing Initiative” - Intel News Release, June 12, 2007
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4 CERN’s Projected Computing Need vs. Power Density 0 30000 40000 50000 20000 10000 60000 70000 80000 2008 20092010 73000 63000 54000 16000 33000 20112012 Source: “Strategies for increasing data centre power efficiency,” Dr. Andreas Hirstius, Sverre Jarp, Andrzej Nowak. CERN Openlab, 19 February 2008 kSPECInt2000 Power (MW) 1.5 2.0 2.5 (CERN limit) 2.5 or 5.0 ? 2008 to 2012: 4.5X (35% CAGR) computing density increase, but with thermal limit of 2.5 MW to possible 5 MW (requires new facility)
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5 Limitations Driving Server Compute Improvements 0 3 4 5 2 1 6 7 8 2008 20092010 1.7 2.1 1 20112012 2.7 3.6 Normalized Query Per Second / w 20132014 9 10 5.3 7.6 1 1.7 5.1 7.8 13 2.1 2.7 3.6 5.2 5.6 Bandwidth with 2Level Memory Constrained Memory Bandwidth Unconstrained Memory Bandwidth Intercept CERN’s Density Requirement for 4.5X compute @ 2.5MW Assume: Constrained memory BW is pin limited with planned memory technology and frequency of the time frame: DDR3 speed up to 2133 MHz and 4 memory channels Source: Intel, future computing density projection
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6 Technology Concepts ‘New Interface’ Multiples of DDR3 BW 2Level memory provides potential TCO improvement CPU High density solutions for scale out workloads 30-40W Low Power µBlade concept Memory 1 Memory 2 Standard Memory Interface
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7 Data Center Innovations High density data centers Containerized data centers
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8 Innovations to Increase Compute Density Silicon Process Target 50% yearly improvements in performance/watt Year Compute Density Data Center Innovation Power Management Small Form Factor New Technology ++++ Datacenter of the Future Source: Intel, based on Intel YoY improvement with SpecPower Benchmark
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9 Backup
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