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Published byLucas Douglas Modified over 9 years ago
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Improvements to the Bose Noise Canceling Headphones Nathan Hanagami
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Project Outline Research available DSP and A/D Converter Units Implement DSP version of Corrected Compensation Curve Add features (Variable EQ/Reverb settings) Use spar processing power to assist in Noise Cancellation Convert Digital portions to FPGA design Optimizations and Work on ASIC layout
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Develop DSP Possible Suppliers –Analog Devices –TI –Xylinx –Linear Tech. –Wolfson Microelectronics –National –Etc.
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Considerations Sampling Rate (Minimum 44.1 kHz) Sampling Width (Minimum 18 bit) Propagation Delay Power Consumption Physical Size Not as concerned about fitting on existing DSP
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Alternatives to Fitting on Chip Integrate EQ controller into cable for extra circuitry Design as upgrade that existing headphones can be plugged into (requires slightly different design than fully replaceable unit) DSP From Stereo To Headphones
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EQ/Reverb Upgrade Allow user to set EQ based on Genre of Music (Rock, Pop, Jazz, Orchestral, etc.) Allow user to set Reverb to various environments (Concert Hall, Small room, Jazz Hall, etc.) Based on assumption that ideal frequency response varies depending on type of music.
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Assist in Noise Cancellation Based on meeting propagation delay requirements. Alternatively will layout hypothetical design parameters Work either in series to further attenuation In parallel to increase cancellation bandwidth
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Convert to FPGA design Adds Customization allowing for easier production Code in VHDL or Verilog Designed to Replace Functionality of DSP, A/D remain non-integrated
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Design Layout for ASIC Costs will probably prevent actual custom chip fabrication Work on Layout Design Present a hypothetical model
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Optimization Reduce Power Consumption Minimize chip area/work on layout Eliminate unneeded parts and minimize costs Work on possible improvements to analog amplification system
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Project Layout
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