1. 1 EDK 7.1 Tutorial -- SystemACE and EthernetMAC on Avnet Virtex II pro Development Boards Chia-Tien Dan Lo Department of Computer Science University of Texas at San Antonio

2. 2 Goals  Avnet Virtex II pro Development is equipped with compact flash memory and gigabit Ethernet interface.  To build a working platform:  Store system in the compact flash  Configure FPGAs from compact flash  Retrieve network packets directly from the Ethernet interface  Store results back to compact flash  Use XMD to assist software development and test

3. 3 Premise  Software  Using EDK 7.1 and ISE 7.1  Download Avnet XBD file for EDK 7.1  Using Windows XP  Hardware  Using Avnet Virtex-II pro development board (XC2VP30-6)  Xilinx Parallel Cable IV (DLC7)  ADS-DB9-MD7 Cable

4. 4 Setup  Connect Xilinx Parallel Cable IV from PC’s printer port to JTAG4 on Avnet board  Omit this if using PCI interface  Connect ADS-DB9-MD6-Cable from PC’s Com1 port to JS1 on Avnet board  Connect J8 to a Ethernet router

5. 5 Using EDK7.1 BSB Wizard  In case Base System Builder Wizard won’t create a new directory, manually create a project directory, say “c:\download\SysaceEthernetTest”  Start EDK 7.1 and check Base System Builder Wizard

6. 6 Use Base System Builder Wizard

7. 7 Browse the directory “SystemaceEthernetTest” created early

8. 8 Create a new design

9. 9 Select Avnet Virtex-II pro Board Note: the Avnet XBD file has to be stored in the directory: C:\EDK7.1i\board\Xilinx\boards\Avnet_V2P30_FF896

10. 10 Select PowerPC

11. 11 Configure Processor  Set processor clock to 300 MHz  Set FPGA JTAG  Enable cache  On-Chip Memory  Data: 64K  Instruction: 128K

12. 12 Configure Processor (cont.)

13. 13 Set I/O Interface  Set RS232 to  OPB UARTLITE  19200 bps  8 data bits  No parity  Use interrupt  Uncheck  SDRAM_64Mx16  SRAM

14. 14 Set I/O Interface (cont.)

15. 15 Set System ACE and Ethernet  Uncheck  FLASH_4Mx32  Check  SysACE_CompactFlash  OPB SYSACE  Use Interrupt  Ethernet_MAC  PLB ETHERNET  No DMA  Use Interrupt

16. 16 Set System ACE and Ethernet (cont.)

17. 17 Set Internal Peripheral  Set PLB BRAM IF CNTLR  plb_bram_if_cntlr_1  16K

18. 18 Set Internal Peripheral (cont.)

19. 19 Set Internal Peripheral (cont.)

20. 20 Software Setup  Set standard I/O to RS232  Check  Memory Test  Peripheral SelfTest

21. 21 Software Setup (cont.)

22. 22 Configure memory for test applications  Set instructions to on-chip instruction memory (iocm_cntlr)  Set data and stack/heap to on-chip data memory (docm_cntlr)

23. 23 Configure memory for test applications (cont.)

24. 24 Configure memory for test applications (cont.)

25. 25 Create System

26. 26 Configure Drivers and Libraries

27. 27 Check xilfatfs

28. 28 Set PROC_INSTANCE to ppc405_0 for xilfatfs

29. 29 Build Hardware: Toos->Update Bitstream This step may take hours subject to the performance of the PC!

30. 30 Build Software: Tools -> Build All User Applications

31. 31 Download Hardware Design to FPGAs  Start iMPACT from XP’s start menu (EDK’s download function may not work!)  Assign implementation/download.bit to XC2VP30 device

32. 32 Download Hardware Design to FPGAs (cont.)

33. 33 Download Hardware Design to FPGAs (cont.)

34. 34 Start a 19200 hyper terminal

35. 35 Start XMD: Tools -> XMD

36. 36 Download Test Applications  In XMD console  Change directory to applications  “cd TestApp_Peripheral”  Download the design  “dow executable.elf”  Run the application  “run”  Monitor the output in the hyper terminal  Some messages should be shown if everything is okay

37. 37 References  Xilinx Platform Studio User Guide, Embedded Development Kit EDK 7.1  Xilinx Embedded System Tools Reference Manual, Embedded Development Kit EDK 7.1i  Xilinx Platform Specification Format Reference Manual, Embedded Development Kit EDK 7.1i  Xilinx OS and Libraries Document Collection  Xilinx EDK PowerPC Tutorial  Avnet User’s Guide, Xilinx Virtex-II Pro Development Kit