1. Penn ESE370 Fall2011 -- DeHon 1 ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems Day 35: December 5, 2012 Transmission Lines Modeling and Termination

2. Transmission Line Agenda Where arise? General wire formulation Lossless Transmission Line See in action in lab Impedance End of Transmission Line? Termination Discuss Lossy Implications Penn ESE370 Fall2011 -- DeHon 2

3. From Day 33 Signal propagate as wave down transmission line V(x,t) = A+Be (x-wt) –Delay linear in wire length –Speed Penn ESE370 Fall2011 -- DeHon 3

4. Wire “Resistance” What is the resistance at V i ? Q to charge V i ? I i given velocity w? R = V i /I i ? Penn ESE370 Fall2011 -- DeHon 4 ViVi V i+1 V i-1 IiIi I i+1 I ci

5. Wire “Resistance” Q=CV I = dQ/dt Moving at rate w I=wCV R=V/I=1/(wC) Penn ESE370 Fall2011 -- DeHon 5 ViVi V i+1 V i-1 IiIi I i+1 I ci

6. Impedance Z 0 =R= 1/wC = 1/(C/sqrt(LC)) Penn ESE370 Fall2011 -- DeHon 6 ViVi V i+1 V i-1 IiIi I i+1 I ci

7. Impedance Assuming infinitely long wire, how look different at V i, V i+1, V i+2 ? Penn ESE370 Fall2011 -- DeHon 7 ViVi V i+1 V i-1 IiIi I i+1 I ci

8. Impedance Transmission line has a characteristic impedance –Looks to driving circuit like a resistance Penn ESE370 Fall2011 -- DeHon 8

9. Infinite Lossless Transmission Line Transmission line looks like resistive load Input waveform travels down line at velocity –Without distortion Penn ESE370 Fall2011 -- DeHon 9 Z0Z0

10. End of Line What happens at the end of the transmission line? –Short Circuit Hint: what must happen in steady state? –Terminate with R=Z 0 –Open Circuit Penn ESE370 Fall2011 -- DeHon 10

11. Short Penn ESE370 Fall2010 -- DeHon 11

12. Terminate R=Z 0 Penn ESE370 Fall2010 -- DeHon 12

13. Open Penn ESE370 Fall2010 -- DeHon 13

14. Longer LC (open) 40 Stages L=100nH C=1pF Stage delay? Drive with 2ns Pulse No termination (open circuit) Penn ESE370 Fall2010 -- DeHon 14

15. Pulse Travel RC Penn ESE370 Fall2010 -- DeHon 15 V1,V3,V4,V5,V6 about 10 stages apart

16. Analyze End of Line Penn ESE370 Fall2010 -- DeHon 16

17. Analyze End of Line Incident wave V i =I i ×Z 0 KCL @ end KVL @ end V=IR relationships? Relate all three V’s using R, Z 0 Penn ESE370 Fall2010 -- DeHon 17

18. Analyze End of Line Incident wave V i =I i ×Z 0 KCL: I i =I r +I t KVL: V i +V r =V t V r =I r ×Z 0 I r =V r /Z 0 V t =I t ×R I t =V t /R I i =V i /Z 0 Penn ESE370 Fall2010 -- DeHon 18

19. Analyze End of Line V i +V r =V t Penn ESE370 Fall2010 -- DeHon 19 Eliminate V t

20. Analyze End of Line V i +V r =V t Penn ESE370 Fall2010 -- DeHon 20

21. Analyze End of Line V i +V r =V t Penn ESE370 Fall2010 -- DeHon 21

22. Reflection Sanity check with previous –Short –Matched –Open Penn ESE370 Fall2010 -- DeHon 22

23. Pulse Travel RC Penn ESE370 Fall2010 -- DeHon 23

24. Visualization http://www.williamson-labs.com/xmission.htm Penn ESE370 Fall2010 -- DeHon 24

25. Back to Source Penn ESE370 Fall2011 -- DeHon 25

26. Back at Source? What happens at source? –Depends on how terminated –Looks like at sink end Penn ESE370 Fall2010 -- DeHon 26

27. R≠Z 0 What happens? –75  termination on 50  line –“Short-Circuit” source? Penn ESE370 Fall2010 -- DeHon 27

28. Simulation For these, with direct drive from voltage source –Source looks like short circuit ( not typical of CMOS ) Source cannot be changed Penn ESE370 Fall2010 -- DeHon 28

29. 50  line, 75  termination Penn ESE370 Fall2010 -- DeHon 29

30. Step Response Penn ESE370 Fall2010 -- DeHon 30

31. Series Termination What happens here? Penn ESE370 Fall2010 -- DeHon 31

32. Simulation Penn ESE370 Fall2010 -- DeHon 32

33. Series Termination R series = Z 0 Initial voltage divider –Half voltage pulse down line End of line open circuit – sees single transition to full voltage Reflection returns to source and sees termination R series = Z 0 No further reflections Penn ESE370 Fall2010 -- DeHon 33

34. Termination Cases Parallel at Sink –Pix Series at Source –pix Penn ESE370 Fall2010 -- DeHon 34

35. CMOS Driver / Receiver What does a CMOS driver look like at the source? –I d,sat =1200  A/  m @ 45nm What does a CMOS inverter look like at the sink? Penn ESE370 Fall2011 -- DeHon 35

36. Admin Project 3 –Due Friday –Make sure you’ve looked at min-size inverter baseline case –Suggest think through recommendations and hints before Paul’s office hours Wednesday Penn ESE370 Fall2011 -- DeHon 36

37. Idea Signal propagate as wave down transmission line –Delay linear in wire length –Speed –Impedance Behavior at end of line depends on termination Both src and sink are “ends” Penn ESE370 Fall2011 -- DeHon 37