1. DSP/BIOS Scheduling Chapter 9 C6000 Integration Workshop Copyright © 2005 Texas Instruments. All rights reserved. Technical Training Organization T TO

2. Goals for Lab 9 CPUEDMA RCVCHAN gBufRcv ADC DAC McBSP Rcv Xmt XMTCHAN gBufXmt COPY L R L R + Technical Training Organization T TO  Add a function to flash the LEDs and add a load  Make “load” and “copy” operate simultaneously

3. Outline  New System Requirements and Possible Solutions  DSP/BIOS Solution  Scheduling  Periodic Functions  Real-time Analysis Tools and I/O  Lab 9 Technical Training Organization T TO

4. TI DSP Lab 9 Requirement - Abstract Previous Requirement  DSP pass-through and addSine New Requirement  Add function to flash LEDs and add load  LED/Load independent of addSine/copy  Issues:  Do we have enough bandwidth (MIPS)?  Will one routine conflict with the other? addSine/copy LED/load What are some possible solutions ? Technical Training Organization T TO

5. main { while(1) { } Possible Solution – while Loop LED/load addSine/copy  Algos run at different rates:  addSine/copy:94Hz  LED/load:4Hz  What if one algorithm starves the other for recognition or delays its response?  Put each routine into an endless loop under main How are these problems typically solved? Technical Training Organization T TO

6. Possible Solution - Use Interrupts (HWI) running idle Time 12354670 Period Compute CPU Usage addSine/copy : 11ms7  s 6% main { while(1); } Timer1_ISR { } Timer2_ISR { } LED/load addSine/copy  An interrupt driven system places each function in its own ISR Interrupt is missed… LED/load: 250 ms100 ms40% 46% How could we prevent this? Technical Training Organization T TO

7. Allow Preemptive Interrupts - HWI  Use DSP/BIOS HWI dispatcher for context save/restore, and allow preemption  Reasonable approach if you have limited number of interrupts/functions  Limitation: Number of HWIs and their priorities are statically determined, only one HWI function for each interrupt running idle Time 12354670  Nested interrupts allow hardware interrupts to preempt each other. main { while(1); } Timer1_ISR { } Timer2_ISR { } LED/load addSine/copy What option is there besides Hardware interrupts? Technical Training Organization T TO

8. main { … // return to O/S; }  DSP/BIOS Use Software Interrupts - SWI  Make each algorithm an independent software interrupt  SWI scheduling is handled by DSP/BIOS  HWI function triggered by hardware  SWI function triggered by software for example, a call to SWI_post()  Why use a SWI?  No limitation on number of SWIs, and priorities for SWIs are user-defined!  SWI can be scheduled by hardware or software event(s)  Defer processing from HWI to SWI LED/load addSine/copy How do HWI and SWI work together? Technical Training Organization T TO

9. HWIs signaling SWIs EDMA INT HWI: urgent code SWI_post(); SWI ints disabledrather than all this time ping or pong?addSine and copyData HWI  Fast response to interrupts  Minimal context switching  High priority only  Can post SWI  Could miss an interrupt while executing ISR SWI  Latency in response time  Context switch performed  Selectable priority levels  Can post another SWI  Execution managed by scheduler Technical Training Organization T TO

10. Another Solution – Tasks (TSK) main { … // return to O/S; }  DSP/BIOS  DSPBIOS tasks (TSK) are similar to SWI, but offer additional flexibility  TSK is more like traditional O/S task  Tradeoffs:  SWI context switch is faster than TSK  TSK module requires more code space  TSKs have their own stack  User preference and system needs usually dictates choice, easy to use both! LED/load addSine/copy What are the major differences between SWI and TSK? Technical Training Organization T TO

11. SWIs and TSKs  Similar to hardware interrupt, but triggered by SWI_post()  All SWI's share system software stack SWI SWI_post start end “run to completion”  SEM_post() triggers execution  Each TSK has its own stack, which allows them to pause (i.e. block) TSK start end Pause SEM_post (blocked state) SEM_pend Technical Training Organization T TO

12. DSP/BIOS Thread Types Priority HWI Hardware Interrupts  Used to implement 'urgent' part of real-time event  Triggered by hardware interrupt  HWI priorities set by hardware SWI Software Interrupts  Use SWI to perform HWI ' follow-up ' activity  SWI's are ' posted ' by software  Multiple SWIs at each of 15 priority levels TSK Tasks  Use TSK to run different programs concurrently under separate contexts  TSK's are usually enabled to run by posting a ' semaphore ‘ (a task signaling mechanism) IDL Background  Multiple IDL functions  Runs as an infinite loop, like traditional while loop

13. Enabling BIOS – Return from main() main { … // return to BIOS }  DSP BIOS LED/load addSine/copy  The while() loop we used earlier is deleted  main() returns to BIOS IDLE allowing BIOS to schedule events, transfer info to host, etc  A while() loop in main() will not allow BIOS to activate BIOS provides several capabilities… Technical Training Organization T TO

14. DSP BIOS Consists Of:  Real-time analysis tools Allows application to run uninterrupted while displaying debug data  Real-time scheduler Preemptive thread management kernel  Real-time I/O Allows two-way communication between threads or between target and PC host.

15. Outline New System Requirements and Possible Solutions DSP/BIOS Solution  Scheduling  Periodic Functions  Real-time Analysis Tools and I/O  Lab 9 Technical Training Organization T TO

16. Priority Based Thread Scheduling HWI 2 HWI 1 SWI 3 SWI 2 SWI 1 MAIN IDLE int1 rtn post2rtn int2 post3rtn post1 rtn User sets the priority...BIOS does the scheduling (highest) (lowest) SWI_post(&swi2); How do you create a SWI and set priorities? Technical Training Organization T TO

17. What is a Thread (SWI)? 1. Function Call 2. Context Save/Restore 3. Priority return IDL HW interrupt SWI_post(&mySWI) return HWI context restore context save mySWI Technical Training Organization T TO

18. HWI SWI 2 SWI 1 main() IDL HWI with SWI & IDL interrupt return post swi2 Skip Slide Animation return interrupt post swi1 SWI_post(swi_name); Legend Technical Training Organization T TO

19. HWI with SWI & IDL HWI SWI 2 SWI 1 main() IDL interrupt return post swi2 return interrupt post swi1 Technical Training Organization T TO

20. TSK Preemption Example HWI SWI 2 SWI 1 IDL main() TSK 2 TSK 1 interrupt pend sem2 return interrupt pend sem2 pend sem1 return post swi1 return post sem2 return post swi2 Skip Slide Animation Technical Training Organization T TO

21. TSK Preemption Example HWI SWI 2 SWI 1 IDL main() TSK 2 TSK 1 interrupt pend sem2 return interrupt pend sem2 pend sem1 return post swi1 return post sem2 return post swi2 How do you set priorities... Technical Training Organization T TO

22. TSK Preemption Example How do you set priorities... HWI SWI 2 SWI 1 IDL main() TSK 2 TSK 1 interrupt pend sem2 SEM_pend(&sem2) return interrupt pend sem2 pend sem1 return post swi1 return post sem2 return post swi2 Technical Training Organization T TO

23. SWI Properties _myFunction Technical Training Organization T TO

24. Managing SWI Priority  Drag and Drop SWIs to change priority  Equal priority SWIs run in the order that they are posted  Drag and Drop SWIs to change priority  Equal priority SWIs run in the order that they are posted How do you pass information to SWIs? Technical Training Organization T TO

25. Pass Value to SWI Using Mailbox  Each SWI has its own mailbox HWI: … SWI_or (&SWIname, value); value _myFunction SWI: temp = SWI_getmbox(); …  Why pass a value? Allows SWI to find out “who posted me”  SWI_or() ORs value into SWI’s mailbox and posts SWI to run  Other posts that use SWI mailbox: SWI_inc(), SWI_dec(), SWI_andn()  SWI_getmbox() inside SWI reads status of mailbox Technical Training Organization T TO

26. Task Code Topology Void taskFunction(…) { // Prolog… while (‘condition’){ blocking_fxn() // Process } // Epilog } Void taskFunction(…) { // Prolog… while (‘condition’){ blocking_fxn() // Process } // Epilog }  Initialization (runs once only)  Processing loop - option: termination condition  Suspend until unblocked  Perform desired DSP work...  Shutdown (runs once - at most)  TSK can encompass three phases of activity (prolog, processing, epilog)  TSKs can be blocked by using: SEM_pend, MBX_pend, SIO_reclaim, and several others (suspend execution until unblocked)  TSKs can be unblocked by using: SEM_post, MBX_post, SIO_issue, etc. T TO Technical Training Organization

27. Outline New System Requirements and Possible Solutions DSP/BIOS Solution Scheduling  Periodic Functions  Real-time Analysis Tools and I/O  Lab 9 Technical Training Organization T TO

28. period LED/load Periodic Functions  Periodic functions run at a specific rate in your system:  e.g. LED/load requires 4Hz  Use the CLK Manager to specify the DSP/BIOS CLK rate in microseconds per “tick”  Use the PRD Manager to specify the period (for the function) in ticks  Allows multiple periodic functions with different rates  Can be used to model a system (various functions w/loading) DSP/BIOS CLK tick Let’s use the Config Tool to create a periodic function… Technical Training Organization T TO

29. Creating a Periodic Function period _func1 DSP/BIOS CLK tick Technical Training Organization T TO

30. PRD Procedure 1.Open CLK Manager: Set the Microseconds/Int property (This sets the DSP/BIOS tick rate.) 2.Open the PRD - Periodic Function Manager: Check the box: Use CLK Manager to drive PRD 3.Insert new PRD 4.Rename the new PRD 5.Modify the new PRD's properties: a.Set the Period to be the number of ticks that you want. b.Set the mode to continuous. c.Fill in the function name with the function that you want to be called. d.Fill in the the arguments if there are any Technical Training Organization T TO

31. Outline New System Requirements and Possible Solutions DSP/BIOS Solution Scheduling Periodic Functions  Real-time Analysis Tools and I/O  Lab 9 Technical Training Organization T TO

32. Built-in Real-Time Analysis Tools  Gather data on target (3-10 CPU cycles)  Send data during BIOS IDLE (100s of non-critical cycles)  Format data on host (1000s of host PC cycles)  Data gathering does NOT stop target CPU  Analyze time NOT spent in IDLE CPU Load Graph Execution Graph  Software logic analyzer  Debug event timing and priority Technical Training Organization T TO

33. Built-in Real-Time Analysis Tools Statistics View  Profile routines w/o halting the CPU  Capture & analyze data without stopping CPU LOG_printf (&logTrace, “addSine ENabled”);  Send debug msgs to host  Doesn’t halt the DSP  Deterministic, low DSP cycle count  More efficient than traditional printf() Message LOG Technical Training Organization T TO

34. RTDX: Real-Time Data Exchange PC TMS320 DSP JTAG E M U R T D X USER CODE Third Party Display CCS  RTDX enables non-obtrusive two-way communication between the host PC and the DSP (during IDLE)  Transfer speed dependent on JTAG bandwidth, connection type (parallel vs. XDS) and DSP activity level  Transfers made via RTDX calls in DSP application code Display  User  TI  3rd Party Technical Training Organization T TO

35. Outline New System Requirements and Possible Solutions DSP/BIOS Solution Scheduling Periodic Functions Real-time Analysis Tools and I/O  Lab 9 Technical Training Organization T TO

36. Lab 9 CPUEDMA RCVCHAN gBufRcv ADC DAC McBSP Rcv Xmt XMTCHAN gBufXmt COPY L R L R + Technical Training Organization T TO  Add a function to flash the LEDs and add a load  Make “load” and “copy” operate simultaneously

37. ti Technical Training Organization Technical Training Organization T TO

38. Additional Topics  Minimum CLK rate & it's affect on the DSP System Technical Training Organization T TO

39. Interrupt Driven System - Problem PeriodComputeCPU Usage Routine A:22  s11  s(50%) Routine B:125  s33  s(26%) 76% Time 12354670 B A running idle y1y1 y2y2 y3y3 y4y4 Missed ! TI DSP main { while(1); } Timer1_ISR { } Timer2_ISR { } B A There are two elements of CPU loading: average & instantaneous Technical Training Organization T TO

40. Interrupt Driven State Machines To solve this scheduling problem, you could build a complicated state-machine in your main( ) routine. main { if tick>set1 if … else if if … else if... else …... } B (part 1) A B (part 2) B (part 3)  Difficult and tedious to write - Need to keep track of various execution times and paths through software  Difficult to maintain - Code is too tightly coupled to allow any changes or updates  Can be slow and large - Conditional statements lead to branching operations and disruptions in normal software flow Time 12354670 B B1B1 B2B2 B3B3 A running idle y1y1 y2y2 y3y3 y4y4 Technical Training Organization T TO

41. Hardware-Interrupt Only Scheduling  No or Difficult Interrupt Pre-emption  Unmanaged Interrupt Context Switch C main background functions  No Guarantee of Concurrency  Non-deterministic timing  No Software Preemption  Ad Hoc Analysis Real-time Problem Summary