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Formal Synthesis and Code Generation of Embedded Real-Time Software Pao-Ann Hsiung National Chung Cheng University Chiayi-621, Taiwan, ROC. 9th ACM/IEEE International Symposium on Hardware- Software Codesign, Copenhagen, Denmark, April 25-27, 2001.
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2 Contents Embedded Real-Time Software Model and Problem Synthesis Algorithm Code Generation Example Conclusions
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3 Embedded Real-Time Software Two Main Issues: Real-Time Constraints Bounded Memory Execution Quasi-Static Data Scheduling (QSDS) Dynamic Real-Time Scheduling (DRTS) Proposed Solutions
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4 Model Time Free-Choice Petri Nets (TFCPN) Each arc from a place is either a unique outgoing arc or a unique incoming arc to a transition.
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5 Synthesis Problem Given a set of TFCPNs, an upper-bound on memory use, and a set of real-time constraints, a software code is to be generated such that: 1) it can be executed on a single processor, 2) its memory usage does not exceed the upper bound, and 3) it satisfies all real-time constraints.
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6 Synthesis Algorithm ERTS_Synth(S, , E) { // Quasi-Static Data Scheduling (QSDS) for each A i in S { B i = CF_generate (A i ); // B i: set of CF components for each CF component A ij in B i { QSS ij = quasi_static_schedule (A ij, ); if QSS ij = NULL { print “QSDS failed for A ij ”; return QError;} else QSS i = QSS i {QSS ij } ; } } // Dynamic Real-Time Scheduling (DRTS) RTS = real_time_schedule (QSS 1,…,QSS n, B 1,…,B n, E ); if RTS = NULL { print “DRTS failed for S”; return DRTS_Error; } else generate_code (S, QSS 1,…, QSS n,RTS ); return Synthesized; }
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7 Quasi-Static Data Scheduling TFCPN net decomposition Conflict-Free Components Finite Complete Cycle Deadlock-Free Quasi-Static Data Scheduled CF-Components
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8 Dynamic Real-Time Scheduling Single Processor Rate-Monotonic Scheduling Earliest Deadline First Scheduling Worst Case Timing Analysis for each TFCPN
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9 Code Generation generate_code(S, QSS 1, QSS 2, …, QSS n, RTS) { for i = 1, …, n { D i = create_process(QSS i ); for j = 1, …, IFR(A i ) { d ij = create_task(QSS i ); generate_task_code ( d ij ); add_task ( d ij, D i ); } } create_main() ; output “ for(i=0, i<length(RTS); i++) { ”; for k = 1, …, RTS output_code ( D ik ); output “ } ”; } IFR(A i ): # transitions in A i with independent firing rates
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10 Optimal Code Hierarchy Main Program Process i Task 1Task 2Task k … Source Transitions in TFCPN
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11 Task Code Generation generate_task_code(d ij ) { output t 0 ; // t 0 : source transition for each ICF sub-component d ijk in d ij { for l = 1, …, u k { if t l is visited continue; if t l is a conflicting transition in T i { if p = in_place(t l ) not visited output “ switch(p){ ”; else output “ break; ”; output “ case t l : call t l ; ”; for all p = out_place(t l ) output “ count(p’)+=F(t(l),p’); ”; times_visited p ++; }
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12 Task Code Generation (contd.) if NumFire (t l ) < NumFire (t l-1 ) { output “ if(count(p)>=F(p,t l ) {call t l ; ”; output “ count(p) =NumFire(t(l 1)); } ”; } if NumFire (t l ) > NumFire (t l-1 ) { output “ while(count(p)>=F(p,t l )){call t l ; ”; for all p = in_place(t l ) output “ count(p) =F(p, t l ); ”; output “ } ”; } if NumFire (t l ) = NumFire (t l-1 ) { output “ count(p) = F(p, t l ); call t l ”; output “ count(p) += F(t l,p); ”; } if times_visited p = num_choice (p) output “ } ”; } } }
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13 Example S = {F 1, F 2 }
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14 Conflict Free Components for F 1 v 12 = (t 11, t 13, t 15, t 15 ) 13 (v 12 ) 26 Quasi-Static Data Scheduling v 11 = (t 11, t 12, t 11, t 12, t 14 ) 11 (v 11 ) 22
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15 Conflict Free Components for F 2 v 21 = (t 21, t 22, 2t 24, 4t 26, t 28, t 29, t 26 ) 31 (v 21 ) 68 v 22 = (t 21, t 23, t 25, 2t 27, t 28, t 29, t 26 ) 15 (v 22 ) 36 Quasi-Static Data Scheduling
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16 Dynamic Real-Time Scheduling TaskPriority ii max ( 1 ) max ( 2 ) T1T1 11002648 T2T2 211068 SchedulableYesNo AlgorithmsRM, EDF 1 = {v 11, v 12 } 2 = {v 12, t 11 t 12 k v 12 t 11 t 12 t 14, k 1}
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17 ERTS Code for task 11 task 11 ( ) { // d 11 = {t 11, t 12, t 14, t 13, t 15 } call t 11 ; switch( p 1 ) { case t 12 : call t 12 ; coun t(p 2 ) + = 1; if(coun t(p 2 ) 2) { call t 14 ; coun t(p 2 ) = 2; } break; case t 13 : call t 13 ; coun t(p 3 ) += 2; whil e(count(p 3 ) 1) { call t 15 ; coun t(p 3 ) =1; } break; } }
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18 ERTS Code for task 21 task 21 ( ) { // d 21 = {t 21, t 22, t 24, t 26, t 23, t 25, t 27 } call t 21 ; switch( p 1 ) { case t 22 : call t 22 ; coun t(p 2 ) += 2; while(coun t(p 2 ) 1) { coun t(p 4 ) += 2; call t 24 ; coun t(p 2 ) =1;} while(coun t(p 4 ) 1) { call t 26 ; coun t(p 4 ) =1;} break; case t 23 :call t 23 ; coun t(p 3 ) += 1; coun t(p 3 ) =1; call t 25 ; coun t(p 5 ) += 2; coun t(p 6 ) += 2; whil e (coun t(p 5 ) 1 coun t(p 6 ) 1) { call t 27 ; coun t(p 5 ) =1; coun t(p 6 ) =1; } break; } }
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19 ERTS Code for task 22 and main() task 22 ( ) { // d 22 = {t 28, t 29, t 26 } call t 28 ; call t 29 ; call t 26 ; } main( ) { k 11 = k 21 = k 22 = 0 ;// iteration numbers while true { if(now() 11 k 11 100) { task 11 ( ); k 11 ++;} if(now() 21 k 21 110) { task 21 ( ); k 21 ++;} if(now() 22 k 22 110) { task 22 ( ); k 22 ++;} } }
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20 Conclusions An algorithm proposed for synthesizing Embedded Real-Time Software Bounded Memory Execution Quasi-Static Data Scheduling Real-Time Constraints Dynamic Real-Time Scheduling Code Generation Optimal # of tasks Future Work: Exception Handling, Verification, Theory on Separation of Concerns
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