1. 1 Synchronous Serial IO Send a separate clock line with data –SPI (serial peripheral interface) protocol –I 2 C (or I2C) protocol Encode a clock with data so that clock be extracted or data has guaranteed transition density with receiver clock via Phase-Locked-Loop (PLL) –IEEE Firewire (clock encoded in data) –USB (data has guaranteed transition density)

2. 2 Serial Peripheral Interface (SPI) SDI: data in SDO: data out SCK: clock © Charles River Media 2005

3. 3 CKE configuration bit allows either falling or rising edge of clock to be used, while CKP selects clock polarity.

4. 4 SMP bit (SSPSTAT SFR) selects whether data is sampled in middle of clock period or at end of clock period. Between the CKP, CKE, SMP bits there is a lot of flexibility in how data is clocked in. Can make the SPI protocol work with just about any serial device.

5. 5 Multiple SPI peripherals each require a separate chip select line via parallel port line. We will concentrate on the I2C serial bus as it does not require use of chip selects. © Charles River Media 2005

6. 6 I 2 C (Inter-Integrated-Circuit) Bus I2C is a two wire serial interface. 16F877a SDA Microchip 24LC515 SDA A2 SCL 10K SCL Vdd A1 A0 SDA A2SCL A1 A0 SCL – clock line SDA – data (bidirectional)

7. 7 What is a bus??

8. 8 Ethernet is a example of a bus

9. 9 I 2 C Features Multiple receivers do not require separate select lines as in SPI –At start of each I 2 C transaction a 7-bit device address is sent –Each device listens – if device address matches internal address, then device responds SDA (data line) is bidirectional, communication is half duplex SDA, SCLK are open-drain, require external pullups –Allows multiple bus masters (will discuss this more later).

10. 10 I2C Bus Addressing No chip selects needed!!!!! pullups are needed

11. 11 I2C Bus Transfer Multiple bytes sent in a transaction; every 8 bits has a 9 th bit that is an acknowledge.

12. 12 Master initiates all transaction s, read or write. Write (master to slave) Read (master from slave)

13. 13 Example: I 2 C Serial EEPROM Will use the Microchip 24LC515 Serial EEPROM to discuss I 2 C operation. The 24LC515 is a 64K x 8 memory. This would require 16 address lines, and 8 data lines if a parallel interface was used, which would use over 50% of available IO pins our PIC16f877a, and if a PIC16f690 was used this would exceed the pincount on the PIC16F690 Putting a serial interface on a memory device lowers the required pin count. Reduces speed since data has to be sent serially, but now possible to add significant external storage to a micro controller with a limited number of Pins.

14. 14 I 2 C Device Addressing Each I2C device has either a 7-bit or 10-bit device address. Consider the I2C Real Time Clock, EEPROM and the I2C DAC (Digital-to-Analog Converter, MAX517). All of these devices have a 7-bit address. This simplifies using all ICs on the same network The 24LC515 address is formatted such that upper four bits are assigned by device manufacturer and are hardcoded in the device. The lower three bits are used in different ways by manufacturer. Microchip 24LC515 SDA A2SCL A1 A0 LC515 control byte (contains slave address): 7 6 5 4 3 2 1 0 1 0 1 0 B0 A1 A0 R/W ‘B0’ is block select (upper/lower 32K). A1, A0 are chip selects, four devices on one bus. R/W = 1 for read, 0 for write.

15. RTC address The first write to RTC contains the RTC address to notify the RTC device on the network that the intention is to write to this device. The DS1307 contains a 7 bit node address of 1101000 (bit 1 to bit 7) and bit 0 is 0 for a read operation or bit 0 is 1 for a write operation. Final address for read from DS1307 0b11010000 or 0xD0 Final address for write to DS1307 0b11010001 or 0xD1 15

16. Real Time Clock 16

17. RTC read The RTC uses the system for Data Read of (Write, Pointer, Then Read)- Slave Receive and Transmit Note the repeated start – this is a specialised start sequence 17 ‘1’ indicates read operation ‘no ack’ because slave is driving data back to master. Pointer to address that is to be read (before read operation) Write operation to point to address that is to be read

18. Repeated Start (i2c_restart) void i2c_restart() { RSEN = 1; /* Repeated start enabled */ while(RSEN); /* wait for condition to finish */ } 18

19. The slave address byte is the first byte received after the START condition is generated by the master. The slave address byte contains the 7-bit DS1307 address, which is 1101000, followed by the direction bit (R/W), which is 1 for a read. After receiving and decoding the slave address the DS1307 outputs an acknowledge on SDA. The DS1307 then begins to transmit data starting with the register address pointed to by the register pointer. If the register pointer is not written to before the initiation of a read mode the first address that is read is the last one stored in the register pointer. The register pointer automatically increments after each byte are read. The DS1307 must receive a Not Acknowledge to end a read. 19

20. 20 I2C Transmission START: high to low transition on SDA while SCL high. IDLE: SCL, SDA high. Valid data: While clock is high, data valid and stable. Data changes while clock is low. STOP: low to high transition on SDA while SCL high.

21. 21 Acknowledgement ACK sent by slave after every 8-bits received. Master releases line (stops driving), samples line on next clock. Slave MUST pull line low. If Master does not detect ACK, then sets error bit. If Slave does not pull line low, the pullup resistors will pull the line low. Most common cause of ACK error – incorrect device address.

22. 22 Checking for end-of- write Timing on write is guaranteed to finish after 5 ms. But can end sooner; to determine if write finished use polling method. No ACK means device is still busy with last write.

23. 23 Read Operation: Current Address An internal counter is used to keep track of last address used A current address read uses this address, only sends the command byte –Internal counter incremented after read operation ‘1’ indicates read operation ‘no ack’ because slave is driving data back to master.

24. 24 Random Read Operation Must first set the internal address counter by starting a write operation, but aborting by not sending data byte Current address read Aborted random write (address only, no data)

25. 25 Sequential Read Like a current address read, but after Slave sends data byte, Master sends ACK instead of STOP –Slave then sends next byte –Code implementation doe this from 0x00 to 0x06 (secs to year) –Internal address counter is only 6 bits wide.

26. Addresses in DS1307 Table 2 shows the address map for the DS1307 RTC and RAM registers. The RTC registers are located in address locations 00h to 07h. The RAM registers are located in address locations 08h to 3Fh. During a multibyte access, when the address pointer reaches 3Fh, the end of RAM space, it wraps around to location 00h, the beginning of the clock space. 26

27. 27 PIC16 I 2 C Registers Synchronous Serial Port on PIC implements I2C Registers are: –SSPCON – control register - we will always set this to 0x28 which enables I2C MASTER mode. –SSPCON1 – control register - used to initiate a START/STOP conditions, indicates if ACK has been received –SSPSTAT – status register – check this to see if byte finished transmitting, or byte has been received –SSPBUF – read/write to this register for data transfer –SSPADD – used to control clock rate

28. 28 I 2 C on the PIC16F877a Will always use master mode on the PIC16 –This means that the PIC will always initiate all I 2 C bus activity To set I2C clock rate, write 8-bit value to the SSPADD register –Clock rate = Fosc/(4 *(SSPADD+1)) I 2 C standard defines 100 KHz and 400 KHz but in reality just about any clock rate from DC to 400 KHz works Clock Rate formula in SSPCON1 description, page 82 of datasheet (page 82 PDF page), section 9-2 of datasheet

29. 29 Lab #3: Read/Write to Serial Real Time Clock Lab #3 has you read/write to a Serial EEPROM via the I2C bus The files i2c_unitec.h, i2c_unitec.c define interface subroutines for the I2C bus This file i2c_rtc.c has subroutines for random read/write to the RTC, conversion of time. The file i2c_rtc_test.c tests uses the subroutines to read/write data to the serial RTC.

30. 30 I2c_unitec.c Subroutines i2c_idle() – wait for idle condition on I2C bus i2c_start() – send a START and wait for START end void i2c_restart(void)-send REPEATED START and wait for REPEATED START to end i2c_stop() – send a STOP and wait for STOP end i2c_ack() – do an ACK cycle i2c_nak() – do a NACK cycle i2c_send(byte) – write byte to I2C, wait for finish, then get an ACK i2c_read() – get a byte from I2C bus i2c_wait(void)-wait for the transaction and ACK cycle to complete and idle condition on I2C bus

31. I2c_rtc.c subroutines unsigned char rtc1307_read(unsigned char address); //RTC DS1307 Random Read Function unsigned char BCD2UpperCh(unsigned char bcd); unsigned char BCD2LowerCh(unsigned char bcd); 31

32. 32 Random Read: rtc1307_read(address) D0 RTC i2c device address with 0-write addr is unsigned char is memory address within RTC (date time memory address) i2c_send (0xD0) i2c_send (address) i2c_start() i2c_restart() i2c_send (0xD1) i2c_read () i2c_stop() Set internal address counter. D0 RTC i2c device address with 1-read Read byte from current address

33. 33 Rtc1307_read(address) /* random read */ unsigned char rtc1307_read(unsigned char address) { unsigned char temp; i2c_start(); i2c_send(0xD0); i2c_send(address); i2c_restart(); i2c_send(0xD1); temp = i2c_read(); i2c_stop(); //this line is Removed Because it is already included in I2C_read function return temp; } Does a random read of RTC

34. 34 i2c_wait() i2c_wait() {//wait for idle mode //puts i2c into idle mode while ((SSPCON2 & 0x1F ) || ( SSPSTAT & 0x04 ) ); /* wait for any pending transfer */ } R/W bit, when ‘0’ then transmit is not in progress Check if lower 5 bits are all ‘0’ indicating that Start, Stop, Acknowledge sequences are all idle.

35. i2c_wait 35

37. 37 i2c_Start()/i2c_Stop() void i2c_start(){ i2c_wait(); // this can be omitted but is good practice /* initiate start, SEN=1 */ SEN=1; /* wait until start finished */ while (SEN==1) continue; /* This is automatically cleared by hardware*/ } begin START wait for end void i2c_Stop() { /* initiate stop, PEN=1 */ PEN = 1; /* wait until stop finished */ while(PEN); /* PEN automatically cleared by hardware */ } begin STOP wait for end

38. 38 i2c_send() i2c_send(unsigned char dat) { /* write data into SSPBUF*/ SSPBUF = dat; /*wait until complete data is sent from buffer */ while(BF); /* wait for acknowledge */ i2c_wait(); /* wait for any pending transfer */ } SSPBUF holds outgoing data Cleared when transmit finished.

39. 39 i2c_read() unsigned char i2c_read(void) { unsigned char temp; i2c_wait(); /*Reception works if transfer is initiated in read mode */ /* initiate read event */ RCEN = 1; /* wait until finished */ while(!BF); temp = SSPBUF; /* read data */ /* Read serial buffer and store in temp register */ return(temp); } Enable receive Will be cleared when finished. Receive buffer should be full Get data

40. 40 An I2C Transaction An I2C transaction is an exchange of data between the PIC and an external device over the I2C bus. All transactions use the calls: i2c_start() i2c_send() Start Transaction Send device address This notifies the device to be communicated with sequence of i2c_send(), i2c_read() Read/Write Data i2c_read() PIC External Device i2c_send() PIC External Device End Transaction i2c_Stop()

41. 41 What do you have know? Serial Peripheral Interface (SPI) – how is this different from I2C? I2C Protocol –What is start, stop, ack conditions, purpose of each –How is data sent, received –Device addressing RTC –Sequential, Random Read operations –Random, Block Write operations