1. Instructor: Alexander Stoytchev http://www.ece.iastate.edu/~alexs/classes/ CprE 281: Digital Logic

2. Logic Gates CprE 281: Digital Logic Iowa State University, Ames, IA Copyright © Alexander Stoytchev

3. Administrative Stuff HW1 is out It is due on Monday Aug 31 @ 4pm. Submit it on paper before the start of the lecture

4. Labs Next Week Please download and read the lab assignment for next week before you go to your lab section. You must print the answer sheet and do the prelab before you go to the lab. The TAs will check your prelab answers at the beginning of the recitation. If you don't have it done you'll lose 20% of the lab grade for that lab.

6. x1=x0= (a) Two states of a switch S x (b) Symbol for a switch A Binary Switch [ Figure 2.1 from the textbook ]

7. (a) Simple connection to a battery S Battery Light x [ Figure 2.2a from the textbook ] A Light Controlled by a Switch

8. (b) Using a ground connection as the return path Power supply S Light x [ Figure 2.2b from the textbook ] A Light Controlled by a Switch

9. S Power supply S Light x1x1 x2x2 [ Figure 2.3a from the textbook ] The Logical AND function (series connection of the switches)

10. [ Figure 2.3b from the textbook ] The Logical OR function (parallel connection of the switches) S Power supplyS Light x1x1 x2x2

11. S Power supplyS Light S X1X1 X2X2 X3X3 [ Figure 2.4 from the textbook ] A series-parallel connection of the switches

12. S Light Power supply R x An Inverting Circuit [ Figure 2.5 from the textbook ]

13. x 1 x 2 x 1 x 2 + AND gate x x x 1 x 2 x 1 x 2  The Three Basic Logic Gates [ Figure 2.8 from the textbook ] OR gate NOT gate

14. Truth Table for NOT x x xx 0 1 1 0

15. x 1 x 2 x 1 x 2  Truth Table for AND

16. Truth Table for OR x 1 x 2 x 1 x 2 +

17. [ Figure 2.6b from the textbook ] Truth Tables for AND and OR

18. AND gate Logic Gates with n Inputs [ Figure 2.8 from the textbook ] OR gate x 1 x 2 x n x 1 x 2  x n +++ x 1 x 2 x n x 1 x 2  x n 

19. [ Figure 2.7 from the textbook ] Truth Table for 3-input AND and OR

20. x 1 x 2 x 3 fx 1 x 2 +  x 3  = [ Figure 2.8 from the textbook ] Example of a Logic Circuit Implemented with Logic Gates

21. x 1 x 2 x 3 fx 1 x 2 +  x 3  = [ Figure 2.8 from the textbook ] Example of a Logic Circuit Implemented with Logic Gates

22. Network Analysis [ Figure 2.10 from the textbook ]

23. Network Analysis [ Figure 2.10 from the textbook ]

24. Network Analysis [ Figure 2.10 from the textbook ]

25. Network Analysis [ Figure 2.10 from the textbook ]

26. Network Analysis [ Figure 2.10 from the textbook ]

27. Timing Diagram [ Figure 2.10 from the textbook ]

28. Truth Table for this Network [ Figure 2.10 from the textbook ]

29. Functionally Equivalent Networks [ Figure 2.10 from the textbook ]

30. Functionally Equivalent Networks [ Figure 2.10 from the textbook ]

31. The XOR Logic Gate [ Figure 2.11 from the textbook ]

32. The XOR Logic Gate

33. [ Figure 2.12 from the textbook ] Addition of Binary Numbers

34. [ Figure 2.12 from the textbook ] Addition of Binary Numbers

48. ?

49. AND

50. Addition of Binary Numbers

51. ?

52. XOR

53. Addition of Binary Numbers

55. a b s0s0 s1s1

57. The following examples came from this book

58. [ Platt 2009 ]

61. Questions?

62. THE END