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Renesas Electronics Corporation © 2010 Renesas Electronics America Inc. All rights reserved. RX 12 Bit Analog-to-Digital Converter 00000-A Rev. 1.0 11/1/10.

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Presentation on theme: "Renesas Electronics Corporation © 2010 Renesas Electronics America Inc. All rights reserved. RX 12 Bit Analog-to-Digital Converter 00000-A Rev. 1.0 11/1/10."— Presentation transcript:

1 Renesas Electronics Corporation © 2010 Renesas Electronics America Inc. All rights reserved. RX 12 Bit Analog-to-Digital Converter 00000-A Rev. 1.0 11/1/10

2 © 2010 Renesas Electronics America Inc. All rights reserved. 2 Agenda Contained in this course: Block Diagram Operating Modes Channel Select Register Converted Value Addition Mode Internal Reference Voltage (Not in RX62N ) Temperature Sensor (Not in RX62N ) Usage Notes This course contains a description of specific features of the RX 12 Bit ADC which is identified as S12AD in the HW manual. For basic ADC technology and terms refer to ADC Technology and ADC Operating Mode courses. For overview of ADC features for a specific group refer to RX Technical Marketing Overview course. This course the describes number of channels, conversion times and other specific items

3 © 2010 Renesas Electronics America Inc. All rights reserved. 3 Block Diagram

4 © 2010 Renesas Electronics America Inc. All rights reserved. 4 Operating Modes Single-Cycle Scan Mode Performs single scan over range of enabled channels Example: Start -> AN00 -> AN01 -> Done Continuous Scan Mode Continually performs conversion of selected analog input(s) Example: Start -> AN00 -> AN01 -> AN00 -> AN01 …

5 © 2010 Renesas Electronics America Inc. All rights reserved. 5 ADC Channel Select Registers New Development Register controls which inputs are converted Allows enabling or disabling individual channels “1” in bit position enables conversion ADANS1 register >16 channels Scan occurs in ascending order ADANS0 Register

6 © 2010 Renesas Electronics America Inc. All rights reserved. 6 ADC Data Registers New Development 16 bit registers one for each channel Can be left or right aligned in 12 bit mode 14 bits left aligned when using A/D converted value addition Padded bits are always read as zero – no need to mask Left Aligned 12 bit result Right Aligned 12 bit result Left Aligned 14 bit result

7 © 2010 Renesas Electronics America Inc. All rights reserved. 7 Automatic Clearing Enable Bit (ACE) New Development Located in AD Control Extended Register When enabled allow automatic clearing of data register after they are read Allows detection of update failure

8 © 2010 Renesas Electronics America Inc. All rights reserved. 8 ADC Conversion New Development

9 © 2010 Renesas Electronics America Inc. All rights reserved. 9 ADC Conversion Time Summary New Development Conversion time based on A/D Clock = PCLK t SCAN = t D + ( t CONV * N) + t ED N is number of channels to convert

10 © 2010 Renesas Electronics America Inc. All rights reserved. 10 A/D Converted Value Addition Mode New Development Performs 2-4 samples on channel and sums results Converted Value Addition Mode Select Register (ADADS0, ADADS1) selects channels to be summed Converted Value Addition Count Select Register (ADADC) selects number of times to sample (1,2,3 or 4) Conversion sequence for: Ch. Select 0,1,2 and 3 Continuous Scan Ch 0 and 2 set for Value Addition Mode Value Addition Count Select set for 4 Ch 1 and 3 can be left or right aligned, 12 bit result Ch 0 and 2 is left aligned regardless of setting, 14 bit result Example

11 © 2010 Renesas Electronics America Inc. All rights reserved. 11 Temperature and Internal Reference Internal connection allows reading Internal Reference Voltage Internal Temperature Sensor Separate Results registers for temp and voltage Can be right aligned, left aligned Can also use value addition mode, always left aligned Temp Sensor and Reference Voltage should not be converted while converting Analog Inputs All ANSi bits should be set to 0

12 © 2010 Renesas Electronics America Inc. All rights reserved. 12 ADC Usage Notes New Development AD conversion complete interrupt (ADI) Can be used as interrupt Can be used to trigger DTC or DMACA Disable ADC (ADST = 0, SW Trigger) before entering power down states

13 © 2010 Renesas Electronics America Inc. All rights reserved. 13 Summary Block Diagram Operating Modes – Single Scan, Continuous Scan Channel Select Register Converted Value Addition Mode Internal Reference Voltage (Not in RX62N) Temperature Sensor (Not in RX62N) Interrupt and Low Power Usage Notes

14 Renesas Electronics America Inc. © 2010 Renesas Electronics America Inc. All rights reserved. Thank You


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