1. ICAL electronics and DAQ schemes - 1 B.Satyanarayana, TIFR, Mumbai For INO Collaboration

2. B.Satyanarayana, TIFR, Mumbai ICAL Electronics September 17, 2008 2 Plan of the presentation  Glass RPC characteristics  ICAL prototype detector  Electronics and DAQ system for the prototype detector  Preliminary results from the prototype detector  ICAL detector  Electronics and DAQ schemes for ICAL  Integration issues  Project implementation strategies

3. B.Satyanarayana, TIFR, Mumbai ICAL Electronics September 17, 2008 3 RPCs for prototype detector  Using 3mm thick Asahi Float glass procured from local market  Polycarbonate buttons, spacers and gas nozzles developed and fabricated  Resistive coat developed in collaboration with a local industry  Operated in avalanche mode using R134:Iso:SF 6 ::95.5:4.3:0.2 gas mixture 1m  1m

4. B.Satyanarayana, TIFR, Mumbai ICAL Electronics September 17, 2008 4 Honeycomb pickup panel Terminations on the non-readout end Machined pickup strips on honeycomb panel Preamp connections on the readout end

5. B.Satyanarayana, TIFR, Mumbai ICAL Electronics September 17, 2008 5 Pulse profiles while measuring Z 0 100  51  Open 48  100 

6. B.Satyanarayana, TIFR, Mumbai ICAL Electronics September 17, 2008 6 RPC pulse profile

7. B.Satyanarayana, TIFR, Mumbai ICAL Electronics September 17, 2008 7 Decay constant  = 10nS

8. B.Satyanarayana, TIFR, Mumbai ICAL Electronics September 17, 2008 8 Charge-pulse height plot

9. B.Satyanarayana, TIFR, Mumbai ICAL Electronics September 17, 2008 9 Charge spectrum of the RPC  = 375fC

10. B.Satyanarayana, TIFR, Mumbai ICAL Electronics September 17, 2008 10 Pulse height-pulse width plot

11. B.Satyanarayana, TIFR, Mumbai ICAL Electronics September 17, 2008 11 Time spectrum of the RPC  t = 1.7nS

12. B.Satyanarayana, TIFR, Mumbai ICAL Electronics September 17, 2008 12 ICAL prototype detector  13 layers of 50 mm thick low carbon iron plates  35 ton absorber mass, rectangular design  1.5 Tesla uniform magnetic field  12, 1m 2 RPC layers  768 readout channels  Trigger on cosmic ray muons  In situ, using RPCs  Using scintillation paddle layers  Record strip hit and timing information  Chamber and ambient parameter monitoring

13. B.Satyanarayana, TIFR, Mumbai ICAL Electronics September 17, 2008 13 Scheme for prototype detector

14. B.Satyanarayana, TIFR, Mumbai ICAL Electronics September 17, 2008 14 RPC stack for INO prototype detector

15. B.Satyanarayana, TIFR, Mumbai ICAL Electronics September 17, 2008 15 Schematic of the prototype detector

16. B.Satyanarayana, TIFR, Mumbai ICAL Electronics September 17, 2008 16 Front-end inventory per layer 2 planes (X & Y) 64 readout channels 8 preamplifier boards 4 Analog Front Ends 2 Digital Front Ends

17. B.Satyanarayana, TIFR, Mumbai ICAL Electronics September 17, 2008 17 Preamplifiers  BARC designed HMCs inventoryHMCs  First stage negative input(1595): 1500 pcs  First stage positive input(1597): 1500 pcs  Second stage(1513): 1400 pcs1513  2 types of preamps for X and Y planesXY  Cascaded HMCs, Gain: 80, 8-in-1Gain: 80  Rise time: 3nS, Noise band: ±7mV  Need about 100 boards per stack  Installation of ¾ th of boards completed

18. B.Satyanarayana, TIFR, Mumbai ICAL Electronics September 17, 2008 18 16-channel analog front-end  Functions  To digitize the preamp signals  To form the pre-trigger (Level-0) logic  Signal shaping  Features  Based on the AD96687 ultra-fast comparator  Common adjustable threshold going up to 500mV  V Th now at -20mV  ECL output for low I/O delay and fast rise times

19. B.Satyanarayana, TIFR, Mumbai ICAL Electronics September 17, 2008 19 32-channel digital front-end  Functions  Latch RPC strip status on trigger  Transfer latched data serially through a daisy chain to the readout module  Time-multiplex strip signals for noise rate monitoring  Generate Level-1 trigger signals  Features  Latch, shift register, multiplexer are implemented in CPLD XC95288  Trigger logic is built into a CPLD XC9536; flexible  Data transfer rates of up to 10MHz

20. B.Satyanarayana, TIFR, Mumbai ICAL Electronics September 17, 2008 20 Control and data router  To route the control signals and shift clock from controller to the individual FEP modules  To route the latch data from all the FEPs to the readout module  To route strip signals from FEPs to the scalers for noise rate monitoring

21. B.Satyanarayana, TIFR, Mumbai ICAL Electronics September 17, 2008 21 Trigger and TDC router  To route the m-Fold signals from each RPC plane to the final trigger module  To route TDC stop signals (1-Fold) from each plane to the TDC module  All signals are in LVDS logic, except TDC stop signals which are in ECL logic for achieving better timing resolution

22. B.Satyanarayana, TIFR, Mumbai ICAL Electronics September 17, 2008 22 Data and monitor control module  On FTO, triggers all the FEPs to latch the strip signals  Initiates serial data transfer to the readout module  Manages the noise rate monitoring of strip signals, by generating periodic interrupts and selecting channels to be monitored sequentially  CAMAC interface for parameter configuration (like data transfer speed, size, monitoring period) as well as diagnostic procedures

23. B.Satyanarayana, TIFR, Mumbai ICAL Electronics September 17, 2008 23 Data and monitor readout Module  Supports two serial connections for event data recording of X and Y planes and 8 channels for noise rate monitoring  Serial Data converted into 16-bit parallel data and stored temporarily in 4k FIFO buffer  Source of LAM for external trigger source  CAMAC interface for data readout to Computer

24. B.Satyanarayana, TIFR, Mumbai ICAL Electronics September 17, 2008 24 Final trigger module  Receives m-fold layer triggers and generates m  n fold final trigger  Final trigger out (FTO) invokes LAM and is Logic Trigger Out (LTO) vetoed by gated LAM  Inputs can be selectively masked  The rates of different m  n combinations counted by embedded 16-bit scalers  Rate monitoring of LTO signal using the built in 24-bit scaler  Logic inputs and m  n signals are latched on an FTO and can be read via CAMAC commands  Implementing using FPGA adds to circuit simplicity and flexibility Developed by ED, BARC

25. B.Satyanarayana, TIFR, Mumbai ICAL Electronics September 17, 2008 25 Power supplies and monitoring  Essentially commercial solutions  Low voltage & monitoring  CAEN’s 1527 mainframe  EASY 3000 system  Multi-channel, adjustable voltage, high current modules  High voltage & monitoring  CAEN’s 2527 mainframe  RPC bias current monitoring  CAEN’s 128-channel ADC board in 2527 mainframe

26. B.Satyanarayana, TIFR, Mumbai ICAL Electronics September 17, 2008 26 Low voltage current inventory  Preamps  ±6V 16.32A each plane  AFEs  +6V 28.8A for each plane  -6V 34.8A for each plane  DFEs  +8V 11.76A for each plane  -8V 6.36A for each plane

27. B.Satyanarayana, TIFR, Mumbai ICAL Electronics September 17, 2008 27 On-line monitoring & services  On-line event display  On-line web portal for monitoring chambers under test as well as ambient conditions of the laboratories  Chambers  High voltage and current  Strip noise rates  Cosmic muon efficiency  Ambient parameters  Temperature  Relative humidity  Barometric pressure  Magnet control and monitoring  Gas system control and monitoring  Web based electronic log book

28. B.Satyanarayana, TIFR, Mumbai ICAL Electronics September 17, 2008 28 BigStack: Data analysis software  ROOT based C code  Works on highly segmented configuration file  Handles event, monitor and trigger rate data  Interactively displays event tracks  Generates frame and strip hit files  Produces well designed summary sheets  Plots and histograms produced:  Efficiency profiles  Absolute and relative timing distributions  Strip cluster size calculations  Strip profiles and lego plots  Strip rate and calibration signal rate profiles and distributions  Paddle and pre-trigger rate profiles and distributions

29. B.Satyanarayana, TIFR, Mumbai ICAL Electronics September 17, 2008 29 A muon track in the BigStack

30. B.Satyanarayana, TIFR, Mumbai ICAL Electronics September 17, 2008 30 Strip hit map of an RPC in a run

31. B.Satyanarayana, TIFR, Mumbai ICAL Electronics September 17, 2008 31 Efficiency time profile of an RPC

32. B.Satyanarayana, TIFR, Mumbai ICAL Electronics September 17, 2008 32 RPC Id HV(KV) Mean(nS) Sigma(nS) RelMean(nS) RelSigma(nS) AB06 09.8 49.53 2.06 -7.64 1.41 JB00 09.6 46.00 2.32 -4.47 1.67 IB01 09.8 42.31 2.15 -0.64 1.63 JB01 09.6 42.55 2.28 -0.87 1.58 JB03 09.8 43.75 2.26 -2.18 1.44 IB02 09.8 38.49 2.31 3.27 1.38 AB02 09.8 42.77 2.53 -1.21 1.51 AB01 09.8 35.30 2.16 6.33 1.71 AB03 09.8 45.82 3.23 -4.55 1.99 AB04 09.8 41.66 2.42 Reference RPC AB07 09.8 40.61 2.47 0.96 1.35 AB08 09.8 41.56 2.80 0.31 1.82 RPC-wise timing parameters

33. B.Satyanarayana, TIFR, Mumbai ICAL Electronics September 17, 2008 33 RPC strip background rate monitor

34. B.Satyanarayana, TIFR, Mumbai ICAL Electronics September 17, 2008 34 We are here …  RPC’s pulse characteristics and ICAL’s requirements understood to a large extent; more will be known from the prototype detector  Formulating competitive schemes for electronics, data acquisition, trigger, control, monitor, on-line software, databases and other systems  Feasibility R&D studies on front-ends, timing elements, trigger architectures, on-line data handling schemes will be shortly taken up  Segmentation, power budgets, integration issues etc. must be addressed  Trade-offs between using available solutions and customised design and developments for ICAL to be debated  Procurement of design tools, infrastructure, fab facilities  Recruitment and placement of design engineers  National and international collaboration and team work

35. B.Satyanarayana, TIFR, Mumbai ICAL Electronics September 17, 2008 35 ICAL module

36. B.Satyanarayana, TIFR, Mumbai ICAL Electronics September 17, 2008 36 Triggered scheme  Conventional architecture  Dedicated sub-system blocks for performing various data readout tasks  Need for Hardware based on-line trigger system  Trigger latency issues and how do we take care in implementation

37. B.Satyanarayana, TIFR, Mumbai ICAL Electronics September 17, 2008 37 Trigger-less DAQ scheme Suitable for low event rate and low background/noise rates On-off control and V th control to disable noisy channels

38. B.Satyanarayana, TIFR, Mumbai ICAL Electronics September 17, 2008 38 Front-end specifications  No input matching circuit needed, HCP strips give ~50Ω characteristic impedance  Avalanche mode, pulse amplitude: 0.5-2mV  Gain (100-200, fixed) depends on the electronic noise obtainable  No gain needed if operated in streamer mode, option to by-pass gain stage  Rise time: < 1nS  Discriminator overhead: 3-4 preferable  Variable V th for discriminator ±10mV to ±50mV  Pulse shaping (fixed) 50-100nS  Pulse shaping removes pulse height information; do w need the latter?

39. B.Satyanarayana, TIFR, Mumbai ICAL Electronics September 17, 2008 39 Front-end considerations  RPC strip pitch versus front-end packaging  n-in-1 ASIC or PCB: Routing of tracks  1-in-1 ASIC: Mounted on pickup panels  Low voltage distribution  DC-DC converters, one per RPC to generate high voltage supply  Output signal routing

40. B.Satyanarayana, TIFR, Mumbai ICAL Electronics September 17, 2008 40 Sub-systems  Front-ends  Latch and timing units  Pipelines and fiber  Backend (VME) data collectors  Trigger system  Central clock  Slow control and monitoring  Gas, magnet, power supplies  Ambient parameters  Safety and interlocks  Computer, networking and security issues  On-line data quality monitors  Voice and video communications  Remote access protocols to detector sub-systems and data

41. B.Satyanarayana, TIFR, Mumbai ICAL Electronics September 17, 2008 41 Important considerations  Information to record on trigger  Strip hit  Timing  Rates  Individual strip background rates ~100Hz  Event rate ~10Hz  On-line monitor  RPC parameters  Ambient parameters  Services, supplies

42. B.Satyanarayana, TIFR, Mumbai ICAL Electronics September 17, 2008 42 Other critical issues  Power requirement and thermal management  25mW/channel → 100KW/detector  Magnet power  Front-end positioning; use absorber to good use!  Do we need forced, water cooled ventilation?  Suggested cavern conditions  Temperature: 20±2 o C  Relative humidity: 50±5%

43. B.Satyanarayana, TIFR, Mumbai ICAL Electronics September 17, 2008 43 Placement of front-end electronics RPC Gas volume RPC signal pickup panel Front-end for X-plane Front-end for Y-plane

44. B.Satyanarayana, TIFR, Mumbai ICAL Electronics September 17, 2008 44 Cables & services routing RPC Iron absorber RPC Signal cables from RPCs Gas, LV & HV cables from RPCs

45. B.Satyanarayana, TIFR, Mumbai ICAL Electronics September 17, 2008 45 DAQ & services’ sub-stations Iron absorber Iron spacer RPC DAQ LV HV Gas

46. B.Satyanarayana, TIFR, Mumbai ICAL Electronics September 17, 2008 46 Industries’ role  What should be INO’s modus operandi for involving industries?  Jobs like chip fabrication of course will be handled by industries (govt. or pvt.)  Can we out source some design jobs as well?  Board design and fabrication  Slow control and monitoring sub-systems  Industries are very eager and quite willing to!  Interacted with CAEN, NI, Datapatterns, ChipSculpt …

47. B.Satyanarayana, TIFR, Mumbai ICAL Electronics September 17, 2008 47 Design team members  INO collaborating institutes must pledge design team members on full or serious basis  Need to train some of the younger members with expert institutions/members  Distributed tools and software so that engineers can work on defined segments of jobs at their home institutions  Particularly useful to begin with when new engineers will be working on well defined primitives