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© 2004, D. J. Foreman 1 Computer Organization
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© 2004, D. J. Foreman 2 Basic Architecture Review Von Neumann ■ Distinct single-ALU & single-Control ■ Fixed circuitry Non-von Neumann ■ Various changes Multiple ALUs Merged ALU and Control Alternatives to ALU
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© 2004, D. J. Foreman 3 Timing Cycle – timing in a computer comes from a master clock controlled by a crystal oscillator Clock ticks (billion cycles / sec) Frequency = 1/period and Period = 1/frequency Let’s use 10 MHz to make the arithmetic easier ■ 10 MHz = 10 x 10 6 Hz = 10 7 Hz ■ Period is 1 / 10 7 = 10 -7 seconds Terms ■ Giga = 10 9 and nano = 10 -9 ■ Mega = 10 6 and micro = 10 -6
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© 2004, D. J. Foreman 4 Storage Speed Hierarchy CPU Registers – internal to CPU Cache (CPU Internal) – very high speed Cache (External) – high speed Main Memory - slow Electronic (SSD) – 0 latency Magnetic Disks – high latency Optical Disk – very high latency Magnetic Tapes – seq'l, very high latency
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© 2004, D. J. Foreman 5 Operation Fetch – get instruction from RAM Decode- h/w determines operation from bit pattern of first (or more) byte(s) Obtain operand data ■ From Registers or RAM ■ Into ALU Execute (perform the operation) Store results back to RAM Update Instruction Counter ■ (sometimes called Program Counter)
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© 2004, D. J. Foreman 6 Device-Controller-Software Relationship Application API O/S Device driver Device controller Device S/W H/W
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© 2004, D. J. Foreman 7 Device Controller Interface Data width Commands ■ Read ■ Write ■ Seek Status codes ■ Busy ■ Error ■ Done ■ Ready
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© 2004, D. J. Foreman 8 I/O Operations Controller manages device Devices are MUCH slower than CPU CPU can process while device runs Need to know when done ■ Polling (continual testing for "done") ■ Special h/w for notification – interrupt flag One bit in CPU Turned on by device controller Turned off by O/S No "race" conditions
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© 2004, D. J. Foreman 9 Interrupt Handling Sequence Controller (atomic action) ■ turns on flag & sets code indicating device H/W (atomic action) ■ Switches to privileged mode ■ Turns interrupts off ■ Turns full memory protect off ■ Sets IC to interrupt handler in O/S O/S ■ Interrupt handler executes ■ Returns to application in user mode
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© 2004, D. J. Foreman 10 Interrupt Handler Saves user state (vs. machine state) ■ Registers ■ Stack pointer ■ IC Switches to device-handler Restores user's state Returns to user with interrupts enabled Might NOT be atomic Allows new interrupt before switching
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© 2004, D. J. Foreman 11 Trap or Supervisor Call Instruction Atomic operation ■ Switches to privileged mode ■ Sets IC to common interrupt handler in O/S ■ Contains code for specific request Common handler ■ Uses code to select address in trap table ■ Trap table contains addresses of specific programs
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© 2004, D. J. Foreman 12 Instruction Processing with Interrupts fetchexecute Interrupts allowed? No yes previous inst pending? No process interrupt yes
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© 2004, D. J. Foreman 13 Direct Memory Addressing Allows device controller to get/put RAM w/o going through the CPU Increases throughput Reduces interrupt handling
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© 2004, D. J. Foreman 14 Device addressing Two methods shown in text: ■ Conventional External to RAM Limited only by size of address ■ Memory-mapped devices Use reserved part of RAM Limited by reserved space Third method – used in some mainframes ■ Channels – addresses 00-0f (1 byte) ■ Sub-channels – addresses 00-ff (2 nd byte) ■ Total of 4096 independent devices (0000-0fff)
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© 2004, D. J. Foreman 15 Loader Processing Find the executable file Resolve relative addresses within program to actual locations Connect DLL's to procedure call structure ■ Shared collection of programs & entry points
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© 2004, D. J. Foreman 16 Pipelined Instructions FetchDecodeExecute Store Fetch Decode Execute Store Fetch Decode Execute Store Done
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© 2004, D. J. Foreman 17 Software, Firmware, Hardware Software ■ Programs you can install/remove/transport to another computer which are stored on disk, CD, etc and run from within RAM Firmware ■ Programs usually installed only by chip maker and which run from within ROM ■ May be upgraded by user (depends on chip) Hardware ■ The physical components of the system
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