1. PRASAD A. PAWASKAR SPN. NO. 0903055 DETE 2 SEMESTER lec1-11

2. Boolean Algebra Boolean Algebra is a mathematical Model for digital logic circuits. Boolean Algebra is a system B={0,1} is the set of values V is the set of variables P={+,, ΄} is the set of operators (basic functions) defined by the truth tables as follows lec1-12

3. xyx+y 000 011 101 111 xyxyxy 000 010 100 111 xx΄x΄ 01 10 lec1-13

4. AND Gate Implements AND function lec1-14

5. OR gate Implements OR function lec1-15

6. NOT gate Implements NOT function lec1-16

7. Basic Laws of Boolean Algebra Identities x + 0 = x x 1 = x Compliments x + x΄ = 1 x x΄ = 0 DeMorgan Law (x y)΄ = x΄ + y΄ (x + y)΄ = x΄ y΄ Idempotent Law x + x = x x x = x Boundness Laws x + 1 = 1 x 0 = 0 Distributive Law Associative Law lec1-17

8. xyx’y+xy’ 000 011 101 110 lec1-18 More commonly-used functions x XOR y = x’y + xy’

9. NAND gate lec1-19

10. NOR gate lec1-110

11. XNOR gate lec1-111

12. Simplification of Boolean Functions General Boolean functions of n variables can be represented by Boolean expressions Truth tables showing the function values for all input combinations Boolean functions can be implemented directly from their expressions, but Complicated expressions may results in circuits Using more gates than necessary or Having longer accumulative gate delay than necesarry lec1-112

13. Minterms of n variables The literals of x is either x or x’ Given n variables, a minterm is a product (result of and operations) of n literals, one from each variable. A mintern is 1 only for one input combination and 0 for the rest input combinations. xy’z (i.e. xy’z) is 1 only when x=1, y=0 and z=1. It is 0 for all other 7 input combinations of the three variables x, y, and z. lec1-113

14. Implementation of Boolean function with minimum gate delay Obtain the truth table of the function Write the minterms corresponding to the input combinations for which the function value is 1. Form a sum of these minterms using OR operation Construct the circuit according to the form obtained (maximum 3 gate delays) example lec1-114

15. xyzf 0001 0010 0101 0110 1000 1011 1100 1111 We have f = x’y’z’ + x’yz’ + x y’z + x y z lec1-115

16. But the sum of minterns can be further simplified to reduce the number of product terms and the number of inputs of the gates example f = x’y’z’ + x’yz’ + xy’z + xyz = x’z’(y’+y) + xz(y’+y) = x’z’ + xz But, how do we reach the simplest form systematically? lec1-116

17. Karnaugh Map Simplication Karnaugh maps three variables and four variables lec1-117

18. one cell for each minterm can be used to represent a function by filling 1’s to the cells corresponding to its minterms Adjacent minterns can be grouped (combined) to form simpler product terms. f = x’y’z’ + x’y’z + x’yz’ + xyz’ lec1-118

19. Groupings are allowed to be overlapped because of idempotent laws, x+x=x. Note the “wrap-around” adjacency due to the gray coding used. Two adjacent two-cell grouping can be further grouped for form simpler term. lec1-119

20. Karnaugh map simplification Find the minterns of the function from the truth table. Draw the Karnaugh map for the function. Start with the largest groupings possible (8, 4, 2) find all possible groups and mark them with corresponding (product) terms (each group should contain at least one cell not covered in previous groupings). All groups obtained are called Prime Implicants. Find all the Essential Prime Implicants, each of which is a prime implicant that contains at least one cell not covered by any other prime implicant. Find other non-essential prime implicants to cover the remaining cells of the function. The simplest form (minimum gate delay and least number of inputs) is obtained by adding (OR) the essential prime implicants and non-essential prime implicants from above. lec1-120