1. Summary of CERN/GSI Meeting on RF Manipulations and LLRF in Hadron Synchrotrons, March 20-21 2014

2. 100 m UNILAC SIS 18 SIS 100/300 HESR Super FRS NESR CR RESR FLAIR Radioactive Ion Production Target Anti-Proton Production Target Existing facility: provides ion-beam source and injector for FAIR New future facility: provides ion and anti-matter beams of highest-intensity and up to high energies Facility for Antiproton and Ion Research

3. RingRF SystemFrequency Range [MHz] Voltage per Cavity [kV] Duty Cycle LengthQty SIS18 Upgrade Ferrite cavities, h=4 Accel. h=2 Bunch Compression 0.85... 5.5 0.43... 2.8 0.8/1.2 16 13.3 40 100% 0.05% 3 m 1.2 m ≈ 1 m 231231 SIS100 Accel. h=10 (Ferrite) Bunch Compression Barrier Bucket Long. Feedback 1.1... 3.2 0.310... 0.560 broadband 20 40 2 x 15 (12) 100% 0.05% 20% 100% 3.0 m 1.2 m 1.1 m 14 9 2 CR (storage ring used for stochastic precooling) Debuncher (RIB, anti-protons, incl. Bucket Generation) 1.10...1.25 (1.50) 40 (21)0.05%1.125 m 5 CRYRING (ion storage ring) Existing Swedish system, „new controls“ 0.01...2.4≈0.21 Overview on the LLRF System Architecture for FAIR Harald Klingbeil

4. Control Aspects, LLRF Requirements CW systems (e.g. accelerating systems) vs. pulsed systems (e.g. bunch compressor) Cavities with "high" Q factor (e.g. accelerating systems, Q=5...10) vs. broadband cavities (e.g. barrier bucket, Q<1) → different response times Fundamental RF frequencies: 300 kHz...5.4 MHz (exception: NESR high harmonics, CRYRING 10 kHz), partly with higher harmonics, fast ramping Mutual synchronization of cavities required, also multi-harmonic (requirement ±3°, note: 1° phase deviation @ 5.4 MHz ↔ about 500 ps) Mutual synchronization of synchrotrons (e.g. for bunch-to-bucket transfers ) Longitudinal beam stabilization (beam phase control, longitudinal feedback), especially for high beam intensities Complex RF manipulations (barrier bucket, dual harmonic acceleration, bunch merging, etc.)

5. Bunch Merging Experiment 30./31.03.2012 This result that was obtained during the beam experiment. It is obvious that the bunches were merged in two steps as desired. Waterfall plot of the beam phase monitor signal for measurement

6.  Fully digital control  Modular: motherboard + different types of daughtercards  Several motherboards collaborate in real-time to implement DLLRF → low- latency digital links between boards.  Sweeping of tagged clock can be transmitted over optical fibres  Digital + analogue RF trains available. Also MDDS RF train at high h.  Extensive use of DSP (floating point) + FPGA (parallel) processing power.  FPGA: (mostly so far) infrastructure, to be setup but not modified  DSP: customisation of the processing to board function & machine  Remote FPGA/DSP configuration available Experience & planning with digital low-level RF systems in small synchrotrons at CERN Maria Elena Angoletta

7.  Timings (now: firmware event triggered by counter)  Reference functions (directly digital).  Digital diagnostics (not black box!)  Digital signals from LLRF & digitized signals from other systems can be displayed in the same virtual scope.  Clock: loops sampling (constant, ~10 µs now) or RF (~f REV ). Digital LLRF overview in: LEIR PSB MedAustron ELENA AD  Ion-therapy and research centre in Wiener-Neustadt (Austria)  Proton & Carbon ion therapy, clinical + non-clinical research  Synchrotron currently under commissioning (protons)  Treatment of first patient expected in late 2015.

8. MedAustron: LLRF layout Current status: cavity servoloop closed & operational. Beam in the synchrotron within days. Being commissioned now.

9. Longitudinal dynamics in the future FAIR SIS-100: transition crossing Sandra Aumon Original Proton Scenario in SIS-100 Do not cross transition

10. Stable phase shift @ Transition Longitudinal dynamics @ Transition Crossing transition means ……

11. Crossing transition energy in SIS-100 Constraint h in transition crossing chosen with bucket consideration

12. Phase and Amplitude Calibration of LLRF Components Uta Hartel

13. Amplitude+phase calibration curve Counter phase measurements to try to minimize the sum voltage of the two cavities Result with CEL

14. A hardware family using VME VXS and FMC mezzanines for RF Low-level RF and Diagnostics applications in CERN's synchrotrons John Molendijk Digital LLRF Principle Notes: DDS = Digital Direct Synthesizer DDC = Digital Down Converter

15. FMC Modules High Pin Count FMCs Developed ADC 16 bit 125 MS/s (DDC) DAC 16 bit 250 MS/s (SDDS) DDS (can be used as Master Direct Digital Synthesis) Notes: DDC = Digital Down Converter SDDS = Slave Digital Direct Synthesizer DSP= Digital Signal Processing FMC FPGA Main FPGA DSP FMCs FPGA Main FPGA manages the communication with: VXS, FMC_FPGA, VME64x, DSP.

16. Generate the revolution frequency, f rev based on the following parameters: B = Magnetic field strength of dipole magnets Particle type (charge Ze, mass m) B-field and revolution frequency information needed for various subsystems Especially important as reference for RF beam control Transmission protocol to be changed with renovation of B-train system PS chosen for first White Rabbit implementation A New Frequency Program in the CERN Proton Synchrotron Magnus Sundal

17. Ethernet based time synchronous network Sub-ns accuracy/precision for synchronization Deterministic low-latency data transfer Existing hardware implementation «Backwards compatible» with standard Ethernet White Rabbit Switch (WRS) 18 ports, Gb/s, VLAN, HP MAC-address register, deterministic low-latency, transparent Old system: Instant distribution of Bdot (rate of change of B-field) 10 µT resolution New flexible frequency program for the PS developed for protons and ions: Distribution of B, Bdot, G & S via White Rabbit 50 nT resolution Data rate of 250 kframes/s Successful validation of B-field distribution via White Rabbit Key point of WRS :

18. The Collector Ring Debuncher Ulrich Laier

19. CR DB LLRF requirements Collector Ring Debuncher System Overview

20. Digital Generation of Radio Frequency References for the FAIR Acceleration Complex B.Zipfel Test installation BuTiS System=> synchronize the RF signal generated at different location connected with the White Rabbit (CERN Control and Timing Network ) BuTiS green line BuTiS= Bunch Phase Timing System is the dedicated time synchronization system for the FAIR project -> Fixed frequency transmission (not sweeping clocks).

21. Existing bunch-to-bucket transfer schemes Thibault Ferrand Applications Booster – PS and LEIR – PS PS – SPS SPS – LHC Future applications FAIR

22. Signal synchronisation Re-synchronisation: one machine should synchronise on the second one or both machines must synchronise on an external clock. In both case the reference signal must be re-synchronised. The different extraction, injection and instrumentation pulses are timed, taking into account the different hardware delays (kickers, pick-ups…) PS – SPS :

23. Implementation and control of RF manipulations in the PS Recent LHC-type beams require more evolved RF manipulations Sequences of: Bunch splitting and merging Batch compression and expansion Buckets different during process  Bucket number control during both transfers PSB to PS Bunches from PSB must be placed into the correct buckets Batch compression works only for even number of bunches Heiko Damerau 1 turn

24. Reduce number of control parameters involved  simplify operational maintainability New hardware to generate digital voltage program data for each cavity Flexible control matrix in software Programming complexity reduced to the requirement of each beam  LHC-type beams: typically 10+2 functions and 4 timings  Single bunch low-intensity beams: 4+2 functions and no timing All cavities of group tuned to same frequency Consequences of fixed tuning groups  Common harmonic number function per group  Common relative phase function per group Voltage program group-to-cavity mapping Mapping from groups to cavities  voltage programs  gap relay timings

25. Azimuthal position of 1 st bunch ambiguous after RF manipulations: bucket/bunch number one? Phase and radial loops closed and act on all RF harmonics simultaneously Spectral component of beam (WCM) along RF manipulation h PL = 9/20 20/21  For h RF = 9  10  20  21 phase loop at h PL = 9  20  21 sufficient Bunches must be displaced symmetrically for averaged phase loop E kin = 1.4 GeV Pure h = 9 Pure h = 21 h PL 9/20 20/21 f rev marker from SPS Bunch numbering convention PS-SPS Beam signal from wall current monitor Convention: 1 st bunch at fixed time position with respect to f rev,SPS  to switch between beams with different RF manipulations  to debug beam transfer between PS and SPS Digital local oscillator is programmable to any sequence of the harmonic number h PL

26. Settings Generation for the RF Systems in FAIR David Ondreka Control System Representation of RF Systems & Settings Generation for FAIR

27. SIS 100 : generic prototype of RF manipulation Merging from h=10 to h=5

28. Status of the Longitudinal Feedback Development for FAIR Kerstin Groß SIS 18 SIS 100

29. Simulations for SIS 18 machine experiment with beam this summer (@ fixed frequency with 2 bunches)

30. PS 10 MHz cavity feedback overview AVC 1TFB hnhn h 200 Final Amplifier, 10 MHz Cavity, Fast Wideband FB DAC ADC DAC Gap Return Drive H - Fast wide-band feedback around amplifier (internal)  Gain limited by delay - 1-turn delay feedback  High gain at n  f rev - Slow voltage control loop (AVC)  Gain control at f RF Vprog Damien Perrelet

31. Why replace the existing feedbacks?  Old 1-turn feedback fully realized in hardware ECL logic  little flexibility  Increase resolution of signal processing from 10 to 14 bits  Suppress multiple clocks and avoid double sampling at 4 f RF and 80 f rev  Remove phase locked loops curing associated unlocking issues due to sweeping  Problem for harmonics h=7 and 21 (LHC); remove need to start from h=8 (limitation in old system)  Improve delay compensation by dedicated parameters for each RF harmonic  Include a digital AVC in the firmware to replace the old analog hardware  Use a unique and increased sweeping clock for the sampling and the processing, integer multiple of the revolution frequency → h s =200  Digital FPGA-based design: → Improve flexibility, reliability, stability, reproducibility, drifts, …  Low latency components and firmware needed for the 1 turn-feedback  The system must follow the harmonic number provided by the control  Demodulation of multiple harmonics with a single clock → non-IQ  Variable automatic delay compensation during the cycle Design choices and constraints

32. Summary -New 1-turn feedback board is ready and meets expectations -The two loops implemented 100% digital in the FPGA with more resolution -Good results without and with beam before LS1 => Commissioning of the new system on the 11 cavities for the restart in 2014 => Final adjustments and eventual modifications during setting-up -FPGA flexibility allows future new features like : => generation of RF multi-harmonics onboard, RF cavity phase loop, cavity phase compensation, studies to use higher sampling clock h s =256,.. Electronic board EDA-02175-V2

33. Coupled-bunch feedback simulations and measurements in the Proton Synchrotron Letizia Ventura In measurements done in 2013 before LS1 coupled-bunch feedback and the spare cavity have been used to excite and damp coupled-bunch oscillation. Demonstrated existing already feedback with detection and excitation at different harmonics h=21 & 18 bunches h=21 & 21 bunches

34. 10 MHz cavities impedance model implemented and crosschecked either with theory and 2013 measurements New feedback also to operate in the frequency domain, similar signal processing as existing feedback, but digital and covering all harmonics simultaneously based on hardware developed for the 1-turn delay feedback First test with the beam after the startup in 2014 Frequency domain longitudinal feedback in the LCBC simulation code implemented and tested

35. SIS18 simulation at injection ( 40 Argon 18+, 11.4 MeV/u), with quadrupolar mode (m=2) Tuning of longitudinal bunch length feedback for SIS18 Dieter Lens Bunch length feedback at SIS18 Beam length: Measure amplitude of beam current basic harmonic Feedback correction of gap voltage amplitude Assumption: cavity dynamics sufficiently fast Beam phase: Measure phase difference between beam and gap voltage Feedback correction of gap voltage phase Assumption: cavity synchronization sufficiently fast Bunch phase and length feedback already successfully tested for stationary beams at SIS18 in 2007

36.  Find feedback models to analyze stability and design different feedback algorithms Analytic models for bunch length feedback for SIS18 using moments Find analytic transfer function

37. Beam experiment of bunch length feedback Beam length Beam phase Comparison of models, simulations and experimental results

38. Summary Repeat the meeting every couple of year to exchange know-how and problem-solving and getting ideas from each other. Participate to each other experiments to exchange experience and experimental methods. Share knowledge on numerical tools and hard- and firmware design flow. Similar machines & problems & implementation Link of 2014 meeting at GSI: https://indico.cern.ch/event/288809/https://indico.cern.ch/event/288809/ Link of previous meeting in 2009 at CERN: http://indico.cern.ch/event/69118/http://indico.cern.ch/event/69118/