1. 1 Detailed Design Review Hybrid Audio Dynamics Processor Team Lead: William Sender Jeffrey Auclair Bryan Beatrez Michael Ferry

2. 2 Agenda ●Problem Definition ○Problem Statement ○Customer Requirements ○Engineering Requirements ●System Design ○Functional Decomposition ○System Architecture

3. 3 Agenda ●Detailed Design ○Embedded Design ○Hardware Design ○Software Design ○Auto-Mode ○BOM ○Risk Assessment ●MSD II Plan

4. 4 Section One Problem Definition

5. 5 Problem Statement Audio amplitude control for motion picture shows. Maintain the quality and dynamics of the sound. Improve flexibility while maintaining audio quality. Maintain usability that of previous devices.

6. 6 Customer Requirements

7. 7 Engineering Requirements

8. 8 Section Two System Design

9. 9 Functional Decomposition

10. 10 System Architecture

11. 11 Section Three Detailed Design

12. 12 Embedded Design LQFP1000 BlockNetPin NumberPin NamePin Type I/O Struct.Alternative FunctionsAdditional Functions ADCAudio In 123PA0I/OTTa USART2_CTS, TIM2_CH1_ETRTIM8_BKIN, TIM8_ETR,TSC_G1_IO1, COMP1_OUT, EVENTOUT ADC1_IN1, COMP1_INM, RTC_ TAMP2, WKUP1, COMP7_INP ADCAudio In 224PA1I/OTTa USART2_RTS, TIM2_CH2, TSC_G1_IO2, TIM15_CH1N, RTC_REFIN, EVENTOUT ADC1_IN2, COMP1_INP, OPAMP1_VINP, OPAMP3_VINP ADCGND20VSSA/VREF-S-Analog Ground/Negative Reference Voltage ADC3V321VREF+S-Postitive Reference Voltage ADC3V322VDDAS-Analog Power Supply BypassRelay_11PE2I/OFT TRACECK, TIM3_CH1, TSC_G7_IO1, EVENTOUT- BypassRelay_22PE3I/OFT TRACED0, TIM3_CH2, TSC_G7_IO2, EVENTOUT-

13. 13 Embedded Design BlockNetPin NumberPin NamePin Type I/O Struct.Alternative FunctionsAdditional Functions Rotary & BackA~C38PE7I/OTTaTIM1_ETR, EVENTOUTADC3_IN13, COMP4_INP Rotary & BackB~C39PE8I/OTTaTIM1_CH1N, EVENTOUTCOMP4_INM, ADC34_IN6 Rotary & BackPB40PE9I/OTTaTIM1_CH1, EVENTOUTADC3_IN2 Rotary & BackBB41PE10I/OTTaTIM1_CH2N, EVENTOUTADC3_IN14 DisplayI2C_D76PA14I/OFTf I2C1_SDA, USART2_TX, TIM8_CH2,TIM1_BKIN, TSC_G4_IO4, SWCLK-JTCK, EVENTOUT - DisplayI2C_C77PA15I/OFTf I2C1_SCL, SPI1_NSS, SPI3_NSS, I2S3_WS, JTDI, USART2_RX, TIM1_BKIN, TIM2_CH1_ETR, TIM8_CH1, EVENTOUT -

14. 14 Embedded Design BlockNetPin Num.Pin NamePin TypeI/O Struct.Alternative FunctionsAdditional Functions DACCH1_CV29PA4I/OTTa SPI1_NSS, SPI3_NSS, I2S3_WS, USART2_CK, TSC_G2_IO1, TIM3_CH2, EVENTOUT ADC2_IN1, DAC1_OUT1, OPAMP4_VINP, COMP1_INM, COMP2_INM, COMP3_INMCOMP4_INM, COMP5_INMCOMP6_INM,COMP 7_INM DACCH2_CV30PA5I/OTTa SPI1_SCK, TIM2_CH1_ETR, TSC_G2_IO2, EVENTOUT ADC2_IN2, DAC1_OUT2, OPAMP1_VINP, OPAMP2_VINM, OPAMP3_VINP COMP1_INM, COMP2_INM, COMP3_INMCOMP4_INM, COMP7_INMCOMP5_INMCOMP6 _INM, PWM CH1_MU G71PA12I/OFT USART1_RTS, USB_DP, CAN_TX, TIM1_CH2N, TIM1_ETR, TIM4_CH2, TIM16_CH1, COMP2_OUT, EVENTOUT - PWM CH2_MU G91PB5I/OFT SPI3_MOSI, SPI1_MOSI, I2S3_SD, I2C1_SMBA, USART2_CK, TIM16_BKIN, TIM3_CH2, TIM8_CH3N, TIM17_CH1, EVENTOUT -

15. 15 Embedded Design TimerUseCounter Resolution TIM6DAC Trigger Generation16-bit TIM7DAC Trigger Generation16-bit TIM16Make Up Gain 1 PWM16-bit TIM17Make Up Gain 2 PWM16-bit TIM1Attack/Release Timer32-bit

16. 16 Embedded Design (Clk Tree) - External Crystal 24 Mhz - System Clock 72 Mhz - Make-up gain timers: Tim 16,17 (16-bit) - DAC timers: 6, 7 (16-bit) - Attack and release timer: Tim 1 (32-bit) - 12-bit SAR ADC: ADC1_IN1, ADC1_IN2 - SYSclk divided by 64 results in the desired sample rate.

17. 17 Embedded Design NetPin NumberPin NamePin TypeI/O StructAlternate FunctionsAdditional Functions 3V31VBATS-Backup Power Supply OSC12 PF0- OSC_INI/OFTfTIM1_CH3N, I2C2_SDAOSC_IN OSC13 PF1- OSC_OUTI/OFTfI2C2_SCLOSC_OUT SW14NRSTI/ORSTDevice reset input / internal reset output (active low) 3V328VDD_4S--- GND49VSS_2S-Digital Ground 3V350VDD_2S-Digital Power Supply GND74VSS_3S-Ground 3V375VDD_3S-Digital Power Supply SW94BOOT0IBBoot Memory Selection GND99VSS_1S-Ground 3V3100VDD_1S-Digital Power Supply

18. 18 Hardware ●Current calculations for power supply design

19. 19 Hardware

20. 20 Hardware

21. 21 Hardware

22. 22 Hardware ●Top Level Design ●Each block is a detailed subsystem

23. 23 Hardware ●Schematic for simulation

24. 24 Hardware

25. 25 Hardware ●Input Section ●Takes balanced differential audio input and creates debalanced signal ●Also provides BPF

26. 26 Hardware ●Precision Rectifier ●Allows rectification of signal while combating diode non-idealities (Forward drop, recovery time)

27. 27 Hardware ●Gain Control Section ●Allows for signal to be attenuated via CV- signal and gained up via CV+ signal. ●VCA is a current in/current out device that requires a transimpedance output section

28. 28 Hardware ●Output Line Driver ●Capable of driving 600 Ohm output with 6dB of gain ●Output DC common mode protect ●RFI protection and surge protection

29. 29 Hardware ●LPF Filter Design

30. 30 Hardware ●Anti-aliasing LPF ●Provides accurate sampled signal ●Chebyshev Design with 0.26dB ripple ●-3dB @ 20kHz ●-40db @ 49kHz

31. 31 Hardware ●Monte-Carlo Analysis

32. 32 Hardware ●Microcontroller ●It’s fast, which is cool ● It likes having capacitors nearby

33. 33 Hardware ●Takes 3.3V signals from the microcontroller and converts them to 5V. ●Same in either direction.

34. 34 Hardware ●Relays provide true bypass ●Diode protected

35. 35 Software Top-Level

36. 36 Software Main Function

37. 37 Software chooseCompress (Attack)

38. 38 Software chooseCompress (Release)

39. 39 Software Compression

40. 40 Software AutoMode Params

41. 41 Software Pseudo Code Break from powerpoint to show pseudo code

42. 42 Auto Mode Auto mode block diagram:

43. 43 Auto Mode Successive algorithm -The active low enable refers to the idea that you would only need to improve your compression settings if gain reduction was occurring in the safety compression block.

44. 44 Auto Mode Safety Mode - When auto mode is initialized this all the signal conditioning that occurs. - Safety mode is a limiter to the incoming signal, +3dbu threshold 20:1 ratio. - It also helps balance the system by feeding back compression data.

45. 45 Auto Mode (Improved Compression Settings)

46. 46 Auto Mode (Improved Compression Settings) - The improved compression will be developed from the product of each sample exceeding the safety compression threshold and how much it is exceeded by. (Sample Value - Threshold) X (# of Samples Exceeding Threshold) = Offset - This offset will be added to the index of an array containing improved compression settings. - It is important to note that in the event the above product is very small the offset will slowly make the compression settings less aggressive in order to not over compress. - the offset will also be scaled appropriately for the array of improved compression settings.

47. 47 Bill of Materials ComponetPrice ComponetPrice Power Supply$40.97Rectifier$6.00 Level Shift$0.940VCA$16.92 MCU$16.82Output Stage$26.10 Relays$9.78LPF$6.04 Input Stage$3.24Chasis$87.90 $214.71

48. 48 Bill of Materials Break from powerpoint to show full Bill of Materials

49. 49 Risks

50. 50 Week 1 -Finish unfinished business from MSDI -Get micro working with prototype board Weeks 2-5 -Layout PCB -Start prototyping code -Populate PCBs MSDII Plan

51. 51 Weeks 6-9 -Test software -Test hardware -Machine the enclosure Weeks 10-15 -Qualitative Tests -Create poster -Iterate until satisfied MSDII Plan

52. 52 Questions ?