1. ECEN 248: INTRODUCTION TO DIGITAL SYSTEMS DESIGN Dept. of Electrical and Computer Engineering

2. Describing Circuit Functionality: Inverter Basic logic functions have symbols. Basic logic functions have symbols. The same functionality can be represented with truth tables · The same functionality can be represented with truth tables · Truth table completely specifies outputs for all input combinations. Truth table completely specifies outputs for all input combinations. The above circuit is an inverter. The above circuit is an inverter. An input of 0 is inverted to a 1. An input of 0 is inverted to a 1. An input of 1 is inverted to a 0. An input of 1 is inverted to a 0. AY 01 10 InputOutput A Y Symbol Truth Table

3. The AND Gate This is an AND gate. This is an AND gate. So, if the two inputs signals So, if the two inputs signals are asserted (high) the output will also be asserted. Otherwise, the output will be deasserted (low). ABY 000 010 100 111 A B Y Truth Table

4. The OR Gate This is an OR gate. This is an OR gate. So, if either of the two So, if either of the two input signals are asserted, or both of them are, the output will be asserted. ABY 000 011 101 111 A B Y

5. The NAND Gate This is a NAND gate. It is a combination of an AND gate followed by an inverter. Its truth table shows this. This is a NAND gate. It is a combination of an AND gate followed by an inverter. Its truth table shows this. ABY 001 011 101 110 A B Y

6. The NOR Gate This is a NOR gate. It is a combination of an OR gate followed by an inverter. It ’ s truth table shows this This is a NOR gate. It is a combination of an OR gate followed by an inverter. It ’ s truth table shows this ABY 001 010 100 110 A B Y

7. The XOR Gate (Exclusive-OR) This is a XOR gate. This is a XOR gate. XOR gates assert their output XOR gates assert their output when exactly one of the inputs is asserted, hence the name. The switching algebra symbol The switching algebra symbol for this operation is , i.e. 1  1 = 0 and 1  0 = 1. ABY 000 011 101 110 A B Y

8. ECEN 248 Introduction to Digital Design Lab Dept. of Electrical and Computer Engineering

9. Lab Details http://ece.tamu.edu/~ysy6529 http://ece.tamu.edu/~ysy6529 http://ece.tamu.edu/~ysy6529 Lab Policies Lab Policies Issue of Components (Room 111A) – Before Lab Class Issue of Components (Room 111A) – Before Lab Class Structure of Lab - Breadboarding and Verilog Structure of Lab - Breadboarding and Verilog Tips & Tricks of Breadboarding Tips & Tricks of Breadboarding Prelab & Postlab Deliverables Prelab & Postlab Deliverables Feedback Form Feedback Form

10. Some Important Rules Deliverables: Deliverables: Prelabs (typed, short and concise) are due at the beginning of each lab. All your designs should be ready. Get TAs help during office hours, if you need help on your design. Prelabs (typed, short and concise) are due at the beginning of each lab. All your designs should be ready. Get TAs help during office hours, if you need help on your design. Postlabs are due at the beginning of next lab. Postlabs are due at the beginning of next lab. Download, Print and Keep the following: Download, Print and Keep the following: Lab Manual: Lab Manual: Syllabus, Lab Policy Document- Breadboard tip & tricks Syllabus, Lab Policy Document- Breadboard tip & tricks Lab details Lab details Appendix A, B Appendix A, B Misc Misc Labs stay open till 9:00PM. Use free lab times to complete the lab work. Arrange meeting with TA for any help. Labs stay open till 9:00PM. Use free lab times to complete the lab work. Arrange meeting with TA for any help.

11. Instruments in the Lab 1.BreadBoard

12. 2.Multimeter 2.Oscilloscope

13. 4.Power Supply Please talk to the TA if there is any doubt regarding the use of instruments. A detailed description of each instrument is given in the Tips and Tricks of Breadboarding Section. Please talk to the TA if there is any doubt regarding the use of instruments. A detailed description of each instrument is given in the Tips and Tricks of Breadboarding Section. For IC pin numbers, refer to Appendix A For IC pin numbers, refer to Appendix A

14. Lab # 1 in Brief Study of Standard Gates Study of Standard Gates Study the standard 2-input gates given in manual Study the standard 2-input gates given in manual Inverter Transfer Characteristics Inverter Transfer Characteristics Plotting the input vs output voltage for an inverter Plotting the input vs output voltage for an inverter Ring Oscillator Ring Oscillator A ring of inverters as a clock signal A ring of inverters as a clock signal Use 5 inverters back to back as shown in Manual Use 5 inverters back to back as shown in Manual

15. Lab # 2: Logic Minimization and K-Maps Details and Hints 1.Draw three K-Maps, one for each output for the Profit Computer based on the information in the Farm problem 2.Connect BCD to Seven Segment as shown 3.Connect Seven Segment Display

16. Deadline First week: Postlab of Lab # 1, part1 is due in class next week. Prelab for Lab # 2 is due in class next week. Second week Postlab of Lab # 1, part2 is due in class next week.