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Chapter 2 Instructions: Language of the Computer Part I.

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Presentation on theme: "Chapter 2 Instructions: Language of the Computer Part I."— Presentation transcript:

1 Chapter 2 Instructions: Language of the Computer Part I

2 Florida A & M University - Department of Computer and Information Sciences Instruction Set (Assembly Lang.) Instructions language of the machine primitive operations that the CPU may execute Instruction set commands understood set of instructions a particular CPU implements Computer design goal easy to build hardware and compiler, maximize performance, and minimize cost

3 Florida A & M University - Department of Computer and Information Sciences Instruction Set The repertoire of instructions of a computer Different computers have different instruction sets But with many of the same instruction types Early computers had very simple instruction sets Simplified implementation Many modern computers also have simple instruction sets

4 Florida A & M University - Department of Computer and Information Sciences Instruction Set Architectures Early trend was to add more and more instructions to new CPUs to do elaborate operations VAX architecture had an instruction to multiply polynomials! Reduced Instruction Set Computing (RISC) philosophy (Cocke IBM, Patterson, Hennessy, 1980s): Keep the instruction set small and simple Makes it easier to build fast hardware. Let software do complicated operations by composing simpler ones.

5 Florida A & M University - Department of Computer and Information Sciences RISC - Reduced Instruction Set Computer RISC philosophy fixed instruction lengths load-store instruction sets limited addressing modes limited operations MIPS, Sun SPARC, HP PA-RISC, IBM PowerPC, Intel (Compaq) Alpha, … Instruction sets are measured by how well compilers use them as opposed to how well assembly language programmers use them

6 Florida A & M University - Department of Computer and Information Sciences The MIPS Instruction Set MIPS Technologies – semiconductor company that built one of the first commercial RISC architectures commercialized Stanford MIPS Used as example throughout textbook Typical of many modern ISAs See MIPS Reference Data tear-out card, and Appendixes B and E MIPS is simple, elegant. Large share of embedded core market Applications in consumer electronics, network/storage equipment, cameras, printers, …

7 Florida A & M University - Department of Computer and Information Sciences Assembly Instructions Each statement (called an instruction), executes exactly one of a short list of simple commands Unlike in C++ (and most other HLLs) where each line can contain multiple operations Instructions are related to operations (=, +, -, *, /) in C++ or Java Ok, enough already…gimme my MIPS!

8 Florida A & M University - Department of Computer and Information Sciences MIPS Arithmetic Operations Syntax of Instructions: 12, 3, 4 where: 1 : operation by name 2 : operand getting result (“destination”) 3 : first operand for operation (“source1”) 4 : second operand for operation (“source2”)

9 Florida A & M University - Department of Computer and Information Sciences MIPS Arithmetic Instructions “ The natural number of operands for an operation like addition is three…requiring every instruction to have exactly three operands, no more and no less, conforms to the philosophy of keeping the hardware simple” three operands and one operation Design Principle 1: Simplicity favors regularity Regularity makes implementation simpler Simplicity enables higher performance at lower cost

10 Florida A & M University - Department of Computer and Information Sciences Arithmetic Operations Addition a = b + c (in C++) add a, b, c (in MIPS) Subtraction d = e - f (in C++) sub d, e, f (in MIPS)

11 Florida A & M University - Department of Computer and Information Sciences Arithmetic Operations How do the following C++ statement? a = b + c + d - e; Compiled into multiple MIPS instructions add a, b, c # a = b + c add a, a, d # a = a + d sub a, a, e # a = a – e Notice: A single line of C may become several lines of MIPS Notice: Everything after the hash mark on each line is ignored (comments)

12 Florida A & M University - Department of Computer and Information Sciences Arithmetic Example What about this example? f = (g + h) - (i + j); Use temporary variables? add temp1, g, h # temp1 = g + h add temp2, i, j # temp2 = i + j sub f, temp1, temp2 # f = temp1 – temp2 # = (g + h) – (i + j)

13 Florida A & M University - Department of Computer and Information Sciences Register Operands Arithmetic instructions use register operands ONLY MIPS has 32 registers in the CPU About half of them are freely available for calculations Benefit: Registers are the fastest memory Access time of < nanosecond (billionth of a sec) Disadvantage: -Registers are the fastest memory Access time of < nanosecond (billionth of a sec)

14 Florida A & M University - Department of Computer and Information Sciences Register Operands Drawback: Since registers are in hardware, there is a predetermined number of them Solution: MIPS code must use registers wisely. 32 registers in MIPS Design Principle 2: Smaller and faster main memory: millions of locations Each MIPS register is 32 bits wide 32-bit data called a word in MIPS Natural unit of access

15 Florida A & M University - Department of Computer and Information Sciences Register Operands MIPS has a 32 32-bit registers Use for frequently accessed data Numbered 0 to 31 $0, $1, $2, …, $31 Has assembler names for easier coding $8 - $15  $t0, $t1, …, $t9 (temporary values) $16 - $23  $s0, $s1, …, $s7 (saved variables) Remaining 16 explained later

16 Florida A & M University - Department of Computer and Information Sciences Variables vs. Registers C++ variables int Farenheit, Celsius; char a, b, c, d, e; Must be declared first with a name & type Type must be same throughout program Registers Have no type Operation determines how register contents are treated

17 Florida A & M University - Department of Computer and Information Sciences Register Operand Examples a = b + c; Allocations: a:s0, b:$s1, c:$s2 MIPS assembly code: add $s0, $s1, $s2 a = b + c + d - e; Allocations: a, b, c, d, e: $s0, $s1, $s2, $s3, $s4 MIPS assembly code: add $s0, $s1, $s2 # a = b + c add $s0, $s0, $s3 # a = a + d sub $s0, $s0, $s4 # a = a - e

18 Florida A & M University - Department of Computer and Information Sciences Register Operand Example f = (g + h) - (i + j); Allocations: f:$s0, g:$s1, h:$s2, i:$s3, j:$s4 (g+h):$t0, (i+j):$t1, MIPS assembly code: add $t1, $s1, $s2 # temp1 = g + h add $t2, $s3, $s4 # temp2 = i + j sub $s0, $t1, $t2 # f = temp1 – temp2 # = (g + h)-(i + j)

19 Florida A & M University - Department of Computer and Information Sciences Register Operands Arithmetic instructions operands must be registers, — only 32 registers provided Compiler associates variables with registers What about programs with lots of variables ProcessorI/O Control Datapath Memory Input Output

20 Florida A & M University - Department of Computer and Information Sciences Memory Viewed as a large, single- dimension array, with an address. A memory address is an index into the array "Byte addressing" means that the index points to a byte of memory. “Word addressing”  the index points to the start of a word (4 contiguous) bytes.... 6 5 4 3 2 1 0 8 bits of data

21 Florida A & M University - Department of Computer and Information Sciences Memory Bytes are nice, but most data items use larger "words" For MIPS, a word is 32 bits or 4 bytes. 2 32 bytes with byte addresses from 0 to 2 32 -1 2 30 words with byte addresses 0, 4, 8,... 2 32 -4... 12 8 4 0 32 bits of data Registers hold 32 bits of data

22 Florida A & M University - Department of Computer and Information Sciences Memory Alignment MIPS requires the address of a word to start at an address that is a multiple of 4 bytes. Alignment Restriction: an object can be only be accessed using an address that is multiple of its size in bytes 0 1 2 3 Word Aligned Not Aligned 0, 4, 8, or C hex Last hex digit of address is: 1, 5, 9, or D hex 2, 6, A hex, or E hex 3, 7, B hex, or F hex

23 Florida A & M University - Department of Computer and Information Sciences Memory Addressing Pitfall Rule: Word addresses are 0,4,8,12,… Word at address Q is followed by the word at address Q+4 Pitfall: assuming next word is at Q+1 Distinction: the next byte is at Q+1

24 Florida A & M University - Department of Computer and Information Sciences Registers vs. Memory Registers are faster to access than memory What if more variables than registers? Compiler tries to keep most frequently used variable in registers (register optimization) Less frequently used variables in memory: spilling Why not keep all variables in memory? Smaller is faster: registers are faster than memory


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