1. Traffic Lights Discussion D8.3a

2. Recall Divide-by-8 Counter Use Q2, Q1, Q0 as inputs to a combinational circuit to produce an arbitrary waveform. s0 0 0 0 0 0 1 s1 0 0 1 0 1 0 s2 0 1 0 0 1 1 s3 0 1 1 1 0 0 s4 1 0 0 1 0 1 s5 1 0 1 1 1 0 s6 1 1 0 1 1 1 s7 1 1 1 0 0 0 State Q2 Q1 Q0 D2 D1 D0 Present state Next state Q0 Q1 Q2 D0 D1 D2

3. s0 0 0 0 0 0 1 1 s1 0 0 1 0 1 0 1 s2 0 1 0 0 1 1 0 s3 0 1 1 1 0 0 1 s4 1 0 0 1 0 1 0 s5 1 0 1 1 1 0 1 s6 1 1 0 1 1 1 0 s7 1 1 1 0 0 0 0 State Q2 Q1 Q0 D2 D1 D0 y Blink

5. module lights ( clr,RYG,clk ); input clr ;// pushbutton switch S4 - pin 69 wire clr ; input clk ;// 1 Hz clock - pin 12 wire clk ; output [5:0] RYG ;// RYGRYG reg [5:0] RYG ; reg [3:0] Q; // 4-bit counter always @(posedge clk or posedge clr) if(clr == 1) Q <= 0; else Q <= Q + 1; lights.v

6. // Traffic lights always @(Q[3:1]) case(Q[3:1]) // RYGRYG 0: RYG = 6'b001100; 1: RYG = 6'b001100; 2: RYG = 6'b010100; 3: RYG = 6'b100100; 4: RYG = 6'b100001; 5: RYG = 6'b100001; 6: RYG = 6'b100010; 7: RYG = 6'b100100; default: RYG = 6'b001100; endcase endmodule lights.v

7. #PACE: Start of PACE I/O Pin Assignments NET "clk" LOC = "p12" ; NET "clr" LOC = "p69" ; NET "RYG " LOC = "p32" ; NET "RYG " LOC = "p31" ; NET "RYG " LOC = "p26" ; NET "RYG " LOC = "p25" ; NET "RYG " LOC = "p20" ; NET "RYG " LOC = "p13" ; lights.ucf

9. G3VM-61A1MOS FET Relay

10. Silicon-Controlled Rectifier (SCR) Text: Section 11-12, pages 446 - 449

11. Triac

15. Using an AC Relay