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Published byAudra Harrell Modified over 9 years ago
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class B, AB and D rf power amplifiers in 0,40 um cmos teChnology
Daniele Agnese MSICT – RF System On Chip 2006/’07
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Summary General idea Technology comparison (CMOS, GaAsFET)
Power amplifiers topology Class B Class AB Class D Project description Simulations/Results Conclusion
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General idea ADS Power amplifiers tutorial Transistor’s model
Circuit adaptation Simulations change
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Technology comparison
GaAsFET 0.4 μm CMOS Vth -2.5 V 0.5 V VDS - IDS
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Power amplifier - Class B
Circuit Crossover distortion: 50% of cycle conducting
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Power amplifier - Class AB
Circuit
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Power amplifier - Class D
Circuit
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Project description Power supply Working point (Bias ports)
Transistor’s parameters Power input signal Load adaptation
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Simulations/Results Class B – 1/2 T=1/850 MHz = 1,2 ns
50% T=1/850 MHz = 1,2 ns Linear region: Vds < Vgs - Vth
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Simulations/Results Class B – 2/2 PAE = (Pload – Pin) / Psupply
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Simulations/Results Class AB – 1/2
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Simulations/Results Class AB – 2/2
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Simulations/Results Class D – 1/2
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Simulations/Results Class D – 2/2
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Conclusion Improvements: Optimize transistors width Efficiency
Matching network Reduce current leakage
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Any questions? Doubts? or comments?
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Thank you a lot for your attention!
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