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Computer Organization and Design Transistors & Logic - II Montek Singh Wed, Oct 16, 2013 Lecture 10.

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Presentation on theme: "Computer Organization and Design Transistors & Logic - II Montek Singh Wed, Oct 16, 2013 Lecture 10."— Presentation transcript:

1 Computer Organization and Design Transistors & Logic - II Montek Singh Wed, Oct 16, 2013 Lecture 10

2 Today’s Topics  Synthesis using standard gates Truth tables Truth tables Universal gates: NAND and NOR Universal gates: NAND and NOR Gates with more than 2 inputs Gates with more than 2 inputs Sum-of-Products Sum-of-Products DeMorgan’s Law DeMorgan’s Law 2

3 Now We’re Ready to Design Stuff!  We need to start somewhere usually it’s the functional specification usually it’s the functional specification A B Y If C is 1 then copy B to Y, otherwise copy A to Y C If you are like most engineers you’d rather see a table, or formula than parse a logic puzzle. The fact is, any combinational function can be expressed as a table. These “truth tables” are a concise description of the combinational system’s function. Conversely, any computation performed by a combinational system can expressed as a truth table. Truth Table

4 We Can Make Most Gates Out of Others  How many different gates do we really need? B>A A B y XOR A B Y A B Y

5 One Will Do!  NANDs and NORs are universal one can make any circuit out of just NANDs, or just NORs! one can make any circuit out of just NANDs, or just NORs!  Ah! But what if we want more than 2-inputs? = = = = = =

6 Gate Trees Suppose we have some 2-input XOR gates: (same idea holds for AND and OR gates) And we want an N-input XOR: A0011A0011 B0101B0101 C0110C0110 t pd = 1 (latency) t pd (latency)= O( ___ ) -- WORST CASE. output = 1 iff number of 1s in input is ODD (“ODD PARITY”) Can we compute N-input XOR faster? N

7 Gate Trees N-input TREE has O( ______ ) levels... Signal propagation takes O( _______ ) gate delays. log N 2121 2 2 log 2 N

8 Design Approach: Sum-of-Products Three steps: 1. Write functional spec as a truth table 2. Write down a Boolean expression for every ‘1’ in the output 3. Wire up the gates!  This approach will always give us logic expressions in a particular form: SUM-OF-PRODUCTS (“SOP”) SUM-OF-PRODUCTS (“SOP”)  “SUM” actually means OR  “PRODUCT” actually means AND Truth Table

9 Straightforward Synthesis  We can implement SUM-OF-PRODUCTS… …with just three levels of logic: …with just three levels of logic:  INVERTERS/AND/OR ABCABC ABCABC ABCABC ABCABC Y

10 Notations  Symbols and Boolean operators:

11 DeMorgan’s Laws  Change ANDs into ORs and vice-versa

12 AB=A+B Useful Gate Structures  NAND-NAND  NOR-NOR C A B Y C A B Y  C A B Y  C A B Y C A B Y C A B Y AB=A+B “Pushing Bubbles” DeMorgan’s Laws

13 An Interesting 3-Input Gate: Multiplexer  Based on C, select the A or B input to be copied to the output Y. Truth Table A B Y C If C is 1 then copy B to Y, otherwise copy A to Y 2-input Multiplexer B C A Y “schematic” diagram A B C 0 1 Gate symbol

14 Multiplexer (MUX) Shortcuts 0101 01S01S 0101 01S01S 0101 01S01S I0I1I2I3I0I1I2I3 Y S 0 S 1 A 4-input Mux (implemented as a tree) 0101 01S01S 0101 01S01S A2B2A3B3A2B2A3B3 Y0Y0 S 0101 01S01S 0101 01S01S A0B0A1B1A0B0A1B1 Y1Y1 Y2Y2 Y3Y3 A 4-bit wide 2-input Mux ABCDSABCDS 01230123 Y A 0-3 B 0-3 S Y 0-3

15 Let’s do some practice examples On whiteboard

16 Next Class  Arithmetic circuits


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