1. 1 CS/COE0447 Computer Organization & Assembly Language CHAPTER 1

2. 2 Transistors Layered Approach in Computer Design Computer Architecture or Instruction Set Architecture Logic gates Microarchitecture Architecture

3. 3 Machine Code Example swap: muli$t0, $a0, 4 add$t0, $a1, $t0 lw$t1, 0($t0) lw$t2, 4($t0) sw$t2, 0($t0) sw$t1, 4($t0) jr$ra void swap(int v[], int k) { int temp; temp = v[k]; v[k] = v[k+1]; v[k+1] = temp; } 00000000101000010… 00000000000110000… 10001100011000100… 10001100111100100… 10101100111100100… 10101100011000100… 00000011111000000… compiler assembler

4. 4 Components of ISA In most cases, a “programmer’s reference manual” (PRM) will disclose the ISA of a processor To understand an ISA, find in PRM –Data types the processor supports –Supported instructions and their definitions –Registers (general-purpose & special purpose) –Processor modes –Exception mechanism

5. 5 Inside a PC Integrated Circuits (ICs) –CPU (Central Processing Unit), companion chipset, memory, peripheral I/O chip (e.g., USB, IDE, IEEE1394, …) Printed Circuit (PC) boards (next slide) –Substrate for ICs and interconnection –Distribution of clock, power supply –Heat dissipation Hard disk, CD-RW DVD-RW, (floppy disk) Power supply Chassis –Holds boards, power supply, and provides physical interface for user and other systems Connectors and cables

6. 6 Closeup photo of one side of a motherboard PCB, showing conductive traces and solder points for through-hole components on the opposite side.

7. 7 Integrated Circuits 1mm~25mm on a side 100 ~ 1000M transistors 25 ~ 250M “logic gates”

8. 8 Technology Trend (Processor Complexity) 2x transistors/chip every 1.5 years!

9. 9 Moore’s Law The term Moore's Law has been coined by Carver Mead around 1970.[4] Moore's original statement can be found in his publication "Cramming more components onto integrated circuits", Electronics Magazine 19 April 1965:Carver Mead[4]integrated circuitsElectronics Magazine19 April1965 “The complexity for minimum component costs has increased at a rate of roughly a factor of two per year... Certainly over the short term this rate can be expected to continue, if not to increase. Over the longer term, the rate of increase is a bit more uncertain, although there is no reason to believe it will not remain nearly constant for at least 10 years. That means by 1975, the number of components per integrated circuit for minimum cost will be 65,000. I believe that such a large circuit can be built on a single wafer.[1]1975[1] Astounding that it has held for so long!!!

10. 10 Memory Capacity Trend (DRAM) 1.4x/year or 2x every 2 years 8000x since 1980!

11. 11 Technology Advances (!) Memory –DRAM capacity: 2x / 2 years (since ’96) –64x size improvement in last decade Processor –Speed (in terms of clock frequency): 2x / 1.5 years (since ’85) –100x performance improvement in last decade Disk –Capacity: 2x / 1 year (since ’97) –250x size improvement in last decade

12. 12 Main memory PC/servers use “DRAM” (Dynamic RAM) –SDRAM –DDR SDRAM –RDRAM (RAMBUS DRAM) A typical SDRAM “module”

13. 13 Main memory, cont’d Embedded computers use DRAM or SRAM (or both) depending on applications SRAM, SDRAM, FLASH all in a same chip!

14. 14 Storage Secondary storage Non-volatile Stores programs, user-saved data, etc. In PC/server domain, magnetic disk (hard- disk) is usually used In embedded computers, “flash” memory or “ROM” is usually employed

15. 15 Storage, cont’d 5.25-inch floppy disk 1.2MB 3.5-inch floppy disk 1.44MB USB Flash card 256MB

16. 16 Storage, cont’d

17. 17 Computer Networks Local Area Network (LAN) –Within limited distance (e.g., in a building) –Mostly based on Ethernet –10Mbps, 100Mbps, 1Gbps, 10Gbps, … Wide Area Network –Connecting networks far apart Proliferation of wireless LAN (IEEE802.11) –1 ~ 100Mbps

18. 18 (Simple) IC Process Overview Silicon ingot (silicon cylinder) (Blank) Wafers Various steps to build circuits on wafers –Patterns of chemicals placed wafer “Wafer test” to sort out bad parts Tested “die” (diced into components – dies, chips) “Packaging” steps –Wire bonding (connected to the I/O pins of a package) “Chip test” to sort out bad parts (mistakes happen during packaging) Products

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