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CS-EE 481 Spring 2005 1 University of Portland School of Engineering Project Golden Mantle CMOS 8-Bit Analog-to-Digital Converter Team T Travis Tompkins.

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Presentation on theme: "CS-EE 481 Spring 2005 1 University of Portland School of Engineering Project Golden Mantle CMOS 8-Bit Analog-to-Digital Converter Team T Travis Tompkins."— Presentation transcript:

1 CS-EE 481 Spring 2005 1 University of Portland School of Engineering Project Golden Mantle CMOS 8-Bit Analog-to-Digital Converter Team T Travis Tompkins K Aaron Krizek O Scott Ostrow Advisor Dr. Joe Hoffbeck Dr. Peter Osterberg Industry Representative Mr. Howard Voorheis

2 CS-EE 481 Spring 2005 2 University of Portland School of Engineering Overview Functionality Accomplishments Final Plans Final Concerns Demo Conclusions

3 CS-EE 481 Spring 2005 3 University of Portland School of Engineering Functionality Input: +1V (CD player) Output: +5V (Speaker and LED bank) Toggle Switch for AC or DC voltage input

4 CS-EE 481 Spring 2005 4 University of Portland School of Engineering Functionality 8-Bit Analog-to-Digital Converter “Tracking” ADC Architecture LED’s Speaker From Op- Amp

5 CS-EE 481 Spring 2005 5 University of Portland School of Engineering Functionality Analog signal “coded” into stream of binary numbers using “tracking” architecture

6 CS-EE 481 Spring 2005 6 University of Portland School of Engineering Accomplishments Wire Wrapped Macro-Model Tracked AC and DC signals Functional Macro-Model allows for MOSIS integration

7 CS-EE 481 Spring 2005 7 University of Portland School of Engineering Pictures KRIZEK TOMPKINS OSTROW

8 CS-EE 481 Spring 2005 8 University of Portland School of Engineering Bill of Materials

9 CS-EE 481 Spring 2005 9 University of Portland School of Engineering Final Plans Integrate MOSIS chip Increasing Demo-ability Debugging to ensure 100% functionality and reliability

10 CS-EE 481 Spring 2005 10 University of Portland School of Engineering Milestone Table NumberDescriptionOriginalPreviousPresent 1Product Pre-Approval09/08/04 2Functional Spec Approval v1.0 (Approval Meeting) 10/08/04 10/11/04 3Project Plan Approval v1.0 (Approval Meeting) 11/05/0411/08/04 6*.tpr File Completion11/24/04 7Off-chip Components Ordered12/03/04 8Design Release (Approval Meeting) 12/06/04 12/15/04 9TOP’s Approval v1.0 (Approval Meeting) 02/11/05 10Chip Received From MOSIS03/18/05 03/30/05 11Prototype Release04/08/05 12Founder’s Day Presentation04/12/05 13Final Report04/22/05

11 CS-EE 481 Spring 2005 11 University of Portland School of Engineering Final Concerns Clean Signal Demo-ability (DC signal) Integration of CMOS chip Macro-Model Burn-out

12 CS-EE 481 Spring 2005 12 University of Portland School of Engineering Demo CD player tracking demo

13 CS-EE 481 Spring 2005 13 University of Portland School of Engineering Conclusions Functionality Accomplishments Final Plans Final Concerns Demo


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