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Scalable Many-field Packet Classification on Multi-core Processors Authors : Yun R. Qu, Shijie Zhou, Viktor K. Prasanna Publisher : International Symposium on Computer Architecture and High Performance Computing Presenter : Kai-Hsun Li Date : 2014/12/10 Department of Computer Science and Information Engineering National Cheng Kung University, Taiwan R.O.C.
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Introduction A recent trend in packet classification is to match a large number of packet header fields. Another trend in packet classification is to use software-based solutions employing multi-core general purpose processors and virtual machines. In this paper, propose a decomposition-based packet classification approach. National Cheng Kung University CSIE Computer & Internet Architecture Lab 2
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Related Work National Cheng Kung University CSIE Computer & Internet Architecture Lab 3 OpenFlow 15-field packet classification rule set
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Proposed Scheme(1/11) Given a rule set consisting of 15 fields, we present our decomposition-based approach in three phases Preprocess Search Merge National Cheng Kung University CSIE Computer & Internet Architecture Lab 4
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Proposed Scheme(2/11) Given a rule set consisting of 15 fields, we present our decomposition-based approach in three phases Preprocess For each of the 15 fields we construct range-tree or hash table for efficient search in that field. Search Merge National Cheng Kung University CSIE Computer & Internet Architecture Lab 5
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Proposed Scheme(3/11) - Preprocess(1/3)- range-tree National Cheng Kung University CSIE Computer & Internet Architecture Lab 6 Overlapping ranges Non-overlapping subranges Rule 1, 3 Rule 2, 4, 5 X0X0 X2X2 X1X1 X3X3 Rule 1, 3Rule 1~5 Rule 2, 4, 5 X0X0 X1X1 X2X2 X3X3
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Proposed Scheme(4/11) - Preprocess(2/3)- range-tree National Cheng Kung University CSIE Computer & Internet Architecture Lab 7 Rule 1, 3Rule 1~5 Rule 2, 4, 5 X0X0 X1X1 X2X2 X3X3
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Proposed Scheme(4/11) - Preprocess(2/3)- range-tree National Cheng Kung University CSIE Computer & Internet Architecture Lab 8 Rule 1, 3 Rule 1~5 Rule 2, 4, 5 X0X0 X1X1 X2X2 X3X3 X0X0 X1X1 X2X2 X3X3 T0T0
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Proposed Scheme(5/11) - Preprocess(3/3)- Hash table National Cheng Kung University CSIE Computer & Internet Architecture Lab 9 Hash keyHash Value 80 1 1704 2 1708 3 59 4 123 5 46 6
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Proposed Scheme(6/11) Given a rule set consisting of 15 fields, we present our decomposition-based approach in three phases Preprocess Search Use range-tree search or Cuckoo hashing for each field, and record the partial matching result of each field in a Bit Vector. Merge National Cheng Kung University CSIE Computer & Internet Architecture Lab 10
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Proposed Scheme(7/11) - Search(1/2) - range-tree National Cheng Kung University CSIE Computer & Internet Architecture Lab 11 X2X2 X1X1 X0X0 X3X3 No match Rule 1,3Rule 1~5
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Proposed Scheme(7/11) - Search(1/2) - range-tree National Cheng Kung University CSIE Computer & Internet Architecture Lab 12 X2X2 X1X1 X0X0 X3X3 No match Rule 1,3Rule 1~5
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Proposed Scheme(7/11) - Search(1/2) - range-tree National Cheng Kung University CSIE Computer & Internet Architecture Lab 13 X2X2 X1X1 X0X0 X3X3 No match Rule 1,3Rule 1~5
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Proposed Scheme(7/11) - Search(1/2) - range-tree National Cheng Kung University CSIE Computer & Internet Architecture Lab 14 X2X2 X1X1 X0X0 X3X3 No match Rule 1,3Rule 1~5
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Proposed Scheme(7/11) - Search(1/2) - range-tree National Cheng Kung University CSIE Computer & Internet Architecture Lab 15 X2X2 X1X1 X0X0 X3X3 No match Rule 1,3Rule 1~5
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Proposed Scheme(8/11) - Search(2/2) - hashing National Cheng Kung University CSIE Computer & Internet Architecture Lab 16 Hash keyHash Value 80 1 1704 2 1708 3 59 4 123 5 46 6 Input:80 f 0 (80) = 5
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Proposed Scheme(8/11) - Search(2/2) - hasing National Cheng Kung University CSIE Computer & Internet Architecture Lab 17 Hash keyHash Value 80 1 1704 2 1708 3 59 4 123 5 46 6 Input:80 f 1 (80) = 1
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Proposed Scheme(9/11) Given a rule set consisting of 15 fields, we present our decomposition-based approach in three phases Preprocess Search Merge The partial results from all the fields are merged in parallel to compute the final result. National Cheng Kung University CSIE Computer & Internet Architecture Lab 18
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Proposed Scheme(10/11) - Merge(1/2) 01001101 National Cheng Kung University CSIE Computer & Internet Architecture Lab 19 10101111 00001101 Merging N-bit vectors(N=8) Bitwise AND
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Proposed Scheme(11/11) - Merge(2/2) National Cheng Kung University CSIE Computer & Internet Architecture Lab 20 0100 1101 10101111 00001101 Bitwise AND Merging 2sets of x-bit subvectors(x=8)
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Experiment Results(1/6) – Simulation Environment National Cheng Kung University CSIE Computer & Internet Architecture Lab 21 ItemIntelAMD CPU2x Intel Xeon E5-24702x AMD Opteron 6278 Core16 physical cores @ 2.3GHz16 physical cores @ 2.4GHz L1 cache32KB16KB L2 cache256KB2MB L3 cache20MB6MB RAM48GB DDR3-160064GB DDR3-1600
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Experiment Results(2/6) – Superfield (1/2) National Cheng Kung University CSIE Computer & Internet Architecture Lab 22 MPLS_tfc ToS Superfield (*,0) , (0,*) , (*,*)
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Experiment Results(3/6) – Superfield (2/3) National Cheng Kung University CSIE Computer & Internet Architecture Lab 23 super field 1 = {Eth_type 、 MPLS_lbl 、 ToS} super field 2 = {Ingr 、 VID 、 Vprty 、 Ptrl 、 MPLS_tfc} super field 3 = {Mata-data} super field 4 = {Eth_src} super field 5 = {Eth_dst} super field 6 = {SA} super field 7 = {DA} super field 8 = {SP} super field 9 = {DP}
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Experiment Results(4/6) – Superfield (3/3) National Cheng Kung University CSIE Computer & Internet Architecture Lab 24
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Experiment Results(5/6) – Intel vs AMD National Cheng Kung University CSIE Computer & Internet Architecture Lab 25
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Experiment Results(6/6) - Comparision summary National Cheng Kung University CSIE Computer & Internet Architecture Lab 26
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