1. Describing target hardware in debuggers Aaron Spear DEBUG TECHNOLOGIES ARCHITECT ACCELERATED TECHNOLOGY DIVISION Feb 2006 DSDP Meeting/Toronto

2. Accelerated Technology Nucleus EDGE Architecture - company confidential 2 Agenda n Common needs for debuggers n Quick look at AT’s proprietary solution n Existing standards/SPIRIT n Extending SPIRIT for debug use

3. Accelerated Technology Nucleus EDGE Architecture - company confidential 3 Debugger features tied to hw details n Board/connection information (e.g. JTAG scan chain info) n Registers (native, coprocessor, peripherals) n Memory maps — Help building apps/validation — HW tools (e.g. memory testing, flashing) — Aid the debugger (e.g. ROM stepping) n Initialization

4. Accelerated Technology Nucleus EDGE Architecture - company confidential 4 What is SPIRIT missing for debugger use? n Core internal register information n Register use information (does reading a register change its contents? Important for a debugger!) n Non-contiguous bitfields?

5. Accelerated Technology Nucleus EDGE Architecture - company confidential 5 Register specific information we need: n id, alternative id’s (e.g. “R15”, “R15_irq”) n bit width n register type (floating point? fixed point?) n access restrictions (RW) n access hints/side effects — volatile contents — reads are destructive — writes may change state/invalidate other memory n dependencies (visibility depends on another register/bit field) n bit fields — which bits (non-contiguous!?) — value to text mapping — formulas/masks for values — default formatting hints (hex vs decimal) — access (RW)

6. Accelerated Technology Nucleus EDGE Architecture - company confidential 6 Memory info we need? n address spaces — id (“Memory”, “IO”,”DATA”, “INST”) — unit size (e.g. 8 bits) — unit count (e.g. 2^32) n Memory maps (core specific/shared) — region name (“DRAM”, “FLASH”) — space reference — offset in space (units) — unit count — Access flags (RWXV) — Required access sizes (none, 16 bit write?) — Memory type (RAM, Flash information)

7. Accelerated Technology Nucleus EDGE Architecture - company confidential 7 What is SPIRIT? SPIRIT stands for: “Structure for Packaging, Integrating and Re- using IP within Tool flows”, n Standard schema for description of HW IP blocks n Standard interfaces for IP creation and configuration scripts (“generators”) n Standard interfaces for “flow based” Electronic Design Automation (EDA) tools

8. Accelerated Technology Nucleus EDGE Architecture - company confidential 8 What is SPIRIT used for today? n Vendor neutral description of IP blocks for use by SoC design tools — Interconnection of HW IP on an SoC — Routing of signals between IP blocks — Cores, peripherals, buses n Focused on creation of SoC

9. Accelerated Technology Nucleus EDGE Architecture - company confidential 9 What does SPIRIT have that is cool for debugger vendors? n Standardized description of memory maps n Address Spaces n Buses/bridges between spaces n Memory mapped registers (peripherals) n Bit fields within registers If it was the memory map used in creation of the SoC, it is going to be correct!

10. Thank You! www.acceleratedtechnology.com